The read current is about a third of write current. The switching time depends on current, the lower current requires longer time. A long enough read could do it. But scaled down resistance goes up, slowing down read anyway.
What is the speed and current consumption for writing SST-MRAM? Write disturbance is a very serious issue for old MRAM. What is the write disturbance for present vertical SST-MRAM? Apreciate your comments.
As we unveil EE Times’ 2015 Silicon 60 list, journalist & Silicon 60 researcher Peter Clarke hosts a conversation on startups in the electronics industry. Panelists Dan Armbrust (investment firm Silicon Catalyst), Andrew Kau (venture capital firm Walden International), and Stan Boland (successful serial entrepreneur, former CEO of Neul, Icera) join in the live debate.