Breaking News
Comments
Newest First | Oldest First | Threaded View
Rchandta1
User Rank
Rookie
re: IBM details 3-D server chip stacks
Rchandta1   12/14/2012 10:48:01 PM
NO RATINGS
Given low volume, 3D stacking using TSV makes perfect sense. Reduction in power consumption would be unparalleled. .. But what about thermal dissipation?

nano_meter
User Rank
Rookie
re: IBM details 3-D server chip stacks
nano_meter   12/12/2012 9:52:46 PM
NO RATINGS
IBM has been filling B323A in East Fishkill N.Y. for years with tooling for advanced nodes. It seems to have been their plan all along. They are running 22nm and 14nm development in pretty good volumes on the latest immersion tools. I don't understand the reference to " has not invested in a leading edge Fab" for quite some time , there is still room to expand in the current building, and as far as I know, they can support at least the next two nodes there.

chipmonk0
User Rank
CEO
re: IBM details 3-D server chip stacks
chipmonk0   12/12/2012 4:33:42 PM
NO RATINGS
For some time IBM has not invested in leading edge Fabs . So they have a reason to pursue TSV based 3D stacking, partitioning of functions ( SRAM, I/O etc. ). The thermal and stress issues of 3D stacking w/ TSVs are only beginning to be studied and both routing and performance would be affected by these factors. Integration at the Package level w/o compromising performance too much requires fine - pitch thin film interconnects and soon drilling holes ( TSVs ) in live Si. This is by no means cheap. By not building Fabs of the latest node IBM saves on Capital but their unit cost goes up because of expensive packaging. But they make large and expensive systems so additional part costs get buried. Companies that sell less than million units of high priced chips ( e,g. FPGA ) are next in line for integration at Package level. This is not the case for Consumer systems where the massive volume enables at least the leaders to build the latest Fabs and integrate everything ( as in a SoC ) on a single small chip. As some of the leading Fabless companies who have recently dabbled in 3D stacking etc. have found out, cost would be a big deterrent. So for them its back to the Intel single chip approach ( but built at offshore Foundries )

krisi
User Rank
CEO
re: IBM details 3-D server chip stacks
krisi   12/12/2012 3:59:53 PM
NO RATINGS
Did they discuss cooling challenges?



Flash Poll
EE Life
Frankenstein's Fix, Teardowns, Sideshows, Design Contests, Reader Content & More
Rishabh N. Mahajani, High School Senior and Future Engineer

Future Engineers: Don’t 'Trip Up' on Your College Road Trip
Rishabh N. Mahajani, High School Senior and Future Engineer
2 comments
A future engineer shares his impressions of a recent tour of top schools and offers advice on making the most of the time-honored tradition of the college road trip.

Max Maxfield

Juggling a Cornucopia of Projects
Max Maxfield
7 comments
I feel like I'm juggling a lot of hobby projects at the moment. The problem is that I can't juggle. Actually, that's not strictly true -- I can juggle ten fine china dinner plates, but ...

Larry Desjardin

Engineers Should Study Finance: 5 Reasons Why
Larry Desjardin
37 comments
I'm a big proponent of engineers learning financial basics. Why? Because engineers are making decisions all the time, in multiple ways. Having a good financial understanding guides these ...

Karen Field

July Cartoon Caption Contest: Let's Talk Some Trash
Karen Field
139 comments
Steve Jobs allegedly got his start by dumpster diving with the Computer Club at Homestead High in the early 1970s.

Top Comments of the Week
Like Us on Facebook
EE Times on Twitter
EE Times Twitter Feed

Datasheets.com Parts Search

185 million searchable parts
(please enter a part number or hit search to begin)