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Peter Clarke
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re: ST-Ericsson shows FDSOI smartphone processor
Peter Clarke   1/14/2013 1:52:57 PM
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@eemikee You are quite correct and thanks for pointing it out. ST-Ericsson references to Quad are to a virtual quad-core based on a physical dual-core. I have amended the copy to reflect this.

eemikee
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re: ST-Ericsson shows FDSOI smartphone processor
eemikee   1/14/2013 1:25:32 PM
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According to STE's press release the processor is actually dual-core running in either high performance or power save mode: "This is achieved by transistor-level electrical bias switching to allow each of two physical cores to run in two different modes, creating an electrically-enabled quad core." Quoted from http://www.stericsson.com/press_releases/L8580_eQuad.jsp the section Notes to Editors, eQuad.

jwtech
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re: ST-Ericsson shows FDSOI smartphone processor
jwtech   1/12/2013 8:36:52 AM
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It's not a quad core, but a dual core. Read the NOTES TO EDITORS under the press release.

lola159
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re: ST-Ericsson shows FDSOI smartphone processor
lola159   1/10/2013 1:43:08 PM
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After STMicroelectronics decision to exit the JV, many speculations have been spread lately in the net about the company.

Peter Clarke
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re: ST-Ericsson shows FDSOI smartphone processor
Peter Clarke   1/10/2013 12:06:53 PM
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@lola159 Who is your source? If that happens it would be shame but probably the FDSOI technology would find another home.

lola159
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re: ST-Ericsson shows FDSOI smartphone processor
lola159   1/10/2013 11:27:37 AM
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I heard that ST-Ericsson is planning to shut-down in 6 months (after St Microelectronics leaving) after selling some of its existing products, is that true??

HS_SemiPro
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re: ST-Ericsson shows FDSOI smartphone processor
HS_SemiPro   1/10/2013 6:58:04 AM
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Performance should always compared at a specific leakage or Power spec for a given silicon area & cost.

xx19xx
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re: ST-Ericsson shows FDSOI smartphone processor
xx19xx   1/10/2013 3:45:25 AM
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@eewiz compared to existing high performance processors it is not the best, rather fall in average performance category. But mastering processor's "Power" is I think the best and right step forward.

Kresearch
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re: ST-Ericsson shows FDSOI smartphone processor
Kresearch   1/9/2013 10:45:06 PM
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Wait to see the stories of 1) STE beat Qualcomm and Nvidia in the near future. 2) STM+GF(FDSOI camp) beat SAMSUNG+GF+UMC(IBM camp) and TSMC in Bulk CMOS and FINFET. Look foreward to seeing more evidence soon.

StupendousGuy
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re: ST-Ericsson shows FDSOI smartphone processor
StupendousGuy   1/9/2013 10:56:36 AM
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Well done STE! The key achievement here is the ability to operate with a so wide voltage range (0.6V to more than 1.1V I guess). Also, low voltage operation is the key for low power (CV^2). This is made possible by FD-SOI technology. I would like to see performance (and power) figures at lower than 0.6V, which is not achievable in bulk CMOS.

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michigan0 Sang Kim First, 28nm bulk is in volume manufacturing for several years by the major semiconductor companies but not 28nm FDSOI today yet. Why not? Simply because unlike 28nm bulk the LDD(Lightly Doped Drain) to minimize hot carrier generation can't be implemented in 28nm FDSOI. Furthermore, hot carrier reliability becomes worse with scaling, That is the major reason why 28nm FDSOI is not manufacturable today and will not be. Second, how can you suppress the leakage currents from such ultra short 7nm due to the short channel effects? How thin SOI thickness is required to prevent punch-through of un-dopped 7nm FDSOI? Possibly less than 4nm. Depositing such an ultra thin film less then 4nm filum uniformly and reliably over 12" wafers at the manufacturing line is extremely difficult or not even manufacturable. If not manufacturable, the 7nm FDSOI debate is over!Third, what happens when hot carriers are generated near the drain at normal operation of 7nm FDSOI? Electrons go to the positively biased drain with no harm but where the holes to go? The holes can't go to the substrate because of the thin BOX layer. Some holes may become trapped at the BOX layer causing Vt shift. However, the vast majority of holes drift through the the un-dopped SOI channel toward the N+Source,...
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