I agree on all counts, I've seen projects ruined on a cost basis because of "cool" ideas. Engineers should take a biological approach to design, ie. no dead weight to coin a phrase. A lot of these things are great "ideas", but the application has to need them.
BTW, I didn't mean to imply that SmartFusion was identical in application to Zynq or the Arria SOCs. Obviously the SmartFusion is a microcontroller and doesn't need external RAM, nor is it going to boot "real" Linux (though I don't think that is even a good criteria for this sort of thing). Not to mention that the Actel parts are based on an entirely different market space and value proposition where this hard processor + FPGA fabric thing may actually make some sense.
First off, being a hardware guy let me say that I love FPGAs. I've had a really difficult time though justifying them for any but the absolute highest end special purpose commercial purposes. I think it is valuable to point out that both hard macro and soft core microprocessors still require external DRAM hanging off of the FPGA to implement a practical soft core processor that can say boot Linux. Does this really make it practical to freely synthesize additional cores after the chip level hardware is locked down? The entire for/against argument changes when you consider synthesizing microcontrollers that use the FPGAs integrated block rams.
Secondly, and I think this is the most important point. FPGAs are just expensive. I'd honestly like to see a table constructed showing say these four soft core processors and calculating based on FPGA cost in similar quantities to standalone uP, logic cells consumed and execution performance a cost in dollars per CoreMark or DMIP.
Even the hard macro based FPGAs seem to be quite pricey (take an honest look at Zync, Fusion and whatever Altera is calling their thing now). Also consider that in nearly every case the hard macro peripheral support is totally inferior to a modern uP SOC. Something like CAN or Gig Ethernet, video/graphic accelerators etc. are outrageously expensive to synthesize in these EPP type devices.
For prototyping SOCs I see the picture. As a very specialized PCIe attached coprocessor for your signal processing application or to implement custom high speed logic I see it. But I just don't the value proposition when it comes to replacing the function of a dsp or microprocessor in designs that by their very nature (using FPGAs) are custom already. There it is more of a hobby. Something that us engineers talk our employers into on really shaky arguments because we want to screw around with cool stuff. Show me that I'm wrong. Please!!!
You forgot at least one company
Micro-Semi-Actel SmartFusion ARM single Hard core
Probably the lowest power consumption/bit.
but have not checked specs recently.
Zync is impressive...I want a platform, just because of the raw potential.
What are the engineering and design challenges in creating successful IoT devices? These devices are usually small, resource-constrained electronics designed to sense, collect, send, and/or interpret data. Some of the devices need to be smart enough to act upon data in real time, 24/7. Are the design challenges the same as with embedded systems, but with a little developer- and IT-skills added in? What do engineers need to know? Rick Merritt talks with two experts about the tools and best options for designing IoT devices in 2016. Specifically the guests will discuss sensors, security, and lessons from IoT deployments.