Just a few other random comments to clean up:
(1) we don't flip-chip the lasers, since they are monolithic which in turn lets us have multiple lasers tuned to different frequencies as we showed in the 50Gbps link. Rather than fabricate mirrors, we use monolithic Bragg gratings at each end of the cavity to photolithographically set the resonant frequency for each color.
(2) I don't claim to know all the history of photonics, but if someone else built something like this in the 80s or 90s, I missed it. I was a DARPA/ISTO PI at the time and DARPA would periodically send the aforementioned companies to Intel to sell me their optical modules. I was building parallel supercomputers at the time with thousands of electrical links between the processing nodes (see ASCI Red for reference) which DARPA dreamed of replacing with optics. At $5K-$10K per transceiver, those transceivers (2 required for each link) would have cost more than the entire machine including processors, memory, and storage. There is simply nothing in common between those modules of yesteryear and what we described last week or in 2010 with 50Gbps module.
Let me suggest that everyone calm down and wait a few months. All will be revealed in good time and great datacenters will be built from it.
We don't use the Raman laser for these comm applications. The Raman laser has been experimentally demonstrated in optical sensing devices. In comms, we use the hybrid silicon laser where a thin sliver of InP is positioned precisely over the silicon laser cavity. The InP patch only serves as a tiny light source. Think of it as tiny LED. It is definitely not a compound semiconductor laser. Everything else is pretty much standard Si or SiGe for the modulators and detectors as well as the passive structures such as multiplexers/demultiplexers.
The difference between the 50Gbps link and the 100Gbps module we showed in the "photonic rack" at OCS is in its manufacturability. The 50Gbps link was built in the lab while the 100Gbps link and all of our future products will be built in the fab. The manufacturing steps, including the wafer-scale InP bonding step, are all now highly automated as well as tuned for high volume manufacturing. That's where we've been "focusing" our time (sorry) over the last two years, and now you are seeing the fruits of our labor.
Rick slightly confused my comment about the electronic content in thhe module. Besides the TIA, we also have to drive the modulators, which is additional electronics. All else is just DC.
More in next post.
Hi, Rick! Looks like some folks have gotten a bit confused with the preview of Intel's Silicon Photonics Technology at the OC Summit.
Since we are not ready to describe our photonic product family, let me rely on our published research to try to clear things up. I don't talk about it very often, but I make it a personal policy as Intel CTO not to hype anything. If I can't show you the technology working in the lab, I don't talk about it. Period.
Since we shipped engineering samples a month ago to folks like Arista Networks, our early customers know that there is no hype. Our version of silicon photonics is fast, real and fully functional at very low power levels.
I suggest that everyone look back at our experimental 50Gbps link. You can see my slides from 2010 by opening: download.intel.com/.../photonics/50G_Silicon_Photonics_Link.pdf
All of the major innovations are described there.
More in next post.
The earlier comment that the Intel announcement was light (pun intended?) on content, and by implication heavy on marketing was right on the mark. Board mounted optics are available from multiple suppliers, using a variety of technologies, with inferred performance of the Intel module offering no distinguishing advantages. The area is of such broad industry interest that there are now several projects in the Optical Interface Forum (OIF) to standardize the I/O and mechanical characteristics. Further, technically oriented presentations start by referencing prior work to place new material in context, among other reasons because giving proper attribution to ideas is the accepted norm in the technical community. It is unfortunate that this approach was not chosen in the announcement.
Andy’s comment that “IEEE standards groups have yet to set this technology and out of competitive politics have been shooting down the notion of a standard specific to silicon optics …” was inappropriate. The IEEE has a rigorous process for adopting new standards which sets a high technical and market bar for new proposals. It is this rigor that is a major factor in the extra ordinary success of Ethernet. Putting more effort in developing solid IEEE proposals is a more constructive approach than casting aspersions on the IEEE process. It is also a better outlet for unhappiness than sawing the branch on which one sits.
Over lunch Intel's Rattner said the laser light source is on the single chip.
The only things off chip are a transimpedence amp "to bring the signal to a useful level" and "drivers required to power the [on chip] silicon hybrid laser."
He and others refused to give product details until a formal product introduction, perhaps at OFC later this year.
Thanks to Luxtera for chiming in!
You mean partitioned like an IBM370. And users get VT100's in the shape of a smartphone.
With all the power in handsets these days, and the inherent interconnected networking of them, centralization is so WRONG. Computing and storage needs to be distributed and pushed outwards, with costs borne by terminal owners, not recentralized.Storage, on the other hand, could arguably be centralized, but that is making the very gross assumption that most users ever need more than one device - they don't.
The ONLY reasons for cenntralization are: a) it is impossible for Big Brother (not just governments, but nosey-Parkers like Facebook and Google) to see, and monitor, what you are doing if you are doing it on a local compute resource that also happens to have its own encryption and ad-blocking capability b) MSFT and others can't force leasing of s/w and reign in software piracy that's rife on standalone compute resources.
The laser itself is electronic, and of course it connects electronically to an electronic PCIe bus. However, a silicon Raman laser in IR wavelengths is indeed possible, as is all optical modulation and forming on-chip waveguides, lenses, and other optical components.
It is not, with just a NIC, different than former approaches in principle of operation, but it is vastly different in terms of cost, size, and power requirements.
Also, a NIC is just the beginning. Having this on-chip will lead to replacing the electronic bus with a much faster and lower power photonic bus for chip-to-chip data transfer. That has huge implications. For example, an optical memory bus might mitigate the need for L3 or even L2 cache. The distance between chips could be several meters without affecting data rates or power consumption, so a system's chips could be distributed across many chassis as if it were one huge mainboard.
What are the engineering and design challenges in creating successful IoT devices? These devices are usually small, resource-constrained electronics designed to sense, collect, send, and/or interpret data. Some of the devices need to be smart enough to act upon data in real time, 24/7. Are the design challenges the same as with embedded systems, but with a little developer- and IT-skills added in? What do engineers need to know? Rick Merritt talks with two experts about the tools and best options for designing IoT devices in 2016. Specifically the guests will discuss sensors, security, and lessons from IoT deployments.