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giriscitek
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re: London Calling: Are ARM's big-little days numbered?
giriscitek   1/22/2013 6:14:26 AM
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BIG-little approach is not the best approach w.r.t area consumption on a SOC ! DVFS can be split into 2 parts ( {DV + DF} Scalling ) : 1. DVS : Dynamic Voltage Scaling (very difficult for high yield, process & foundry dependent) 2. DFS : Dynamic Frequency Scaling (Much more design than process/foundry dependent : Eg. Turbo functionality of Intel & AMD processors) Dynamic frequency(DF) scaling without going into dynamic-voltage(DV) scaling issues is a much better idea for overall optimised power consumption. ARM has some customers who want their SOC to get manufactured other than TSMC much of the likes of Samsung, SMIC and Global Foundries. Hence to keep area consumption as compact as possible at the same time dynamically control the overall power consumption by altering (lowering) required performance by using DFS is much more lucrative than BIG-little approach which ARM has undertaken right now. But, BIG-little approach is much more a safe bet for any SOC design perspective because it is much more "process-independent(PI)" than "process-dependent(PD)" which makes is as a foundry independent design idea. BIG-little approach will live for now.

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