Design Con 2015
Breaking News
Comments
Newest First | Oldest First | Threaded View
hthibieroz
User Rank
Rookie
re: Stars of DesignCon: Behavioral modeling aids analog/mixed-signal
hthibieroz   2/28/2013 5:36:57 PM
NO RATINGS
Hello, I wrote a summary at http://bit.ly/WjRxZT

hthibieroz
User Rank
Rookie
re: Stars of DesignCon: Behavioral modeling aids analog/mixed-signal
hthibieroz   1/31/2013 4:51:20 PM
NO RATINGS
Frank, It was indeed a great panel. I had panelists from various background experts in their areas sharing their opinions on various questions pertinent to behavioral modeling- from IBIS/IBIS-AMI to VerilogAMS and real number modeling. The panel was really well received and there was a lot of interesting reactions in the audience. I will generate a summary because some of the questions that I asked triggered really interesting responses. Regarding your comment, there is definitively a push to move the simulation entirely in the digital space. However, I do believe, that depending of what your end goal is (functional verification/ first path or need for more analog accuracy), simulating only using a digital solver (using behavioral verilog or real number modeling) may not be enough and you may have to deal with a mixed flow.

old account Frank Eory
User Rank
Rookie
re: Stars of DesignCon: Behavioral modeling aids analog/mixed-signal
old account Frank Eory   1/29/2013 7:47:00 PM
NO RATINGS
I bet this was a great panel discussion. Wish I could've attended. BTW, as cool as Verilog-AMS is, it is still awfully slow for a transient simulation with a lot of high frequency events. For chip-level verification of an AMS IC, we have had good results just modeling analog blocks in behavioral Verilog. You can make those models as simple or as detailed as you like, and still maintain essentially the same fast simulation times as a pure digital Verilog RTL simulation.

Daniel Payne
User Rank
CEO
re: Stars of DesignCon: Behavioral modeling aids analog/mixed-signal
Daniel Payne   1/29/2013 4:25:21 PM
NO RATINGS
I think that you meant to say that Verilog-AMS was derived from the IEEE 1364 Verilog HDL specification, however your article says it was derived from VHDL. http://www.accellera.org/activities/committees/verilog-ams/about/



Flash Poll
Top Comments of the Week
Like Us on Facebook
EE Times on Twitter
EE Times Twitter Feed

Datasheets.com Parts Search

185 million searchable parts
(please enter a part number or hit search to begin)
EE Life
Frankenstein's Fix, Teardowns, Sideshows, Design Contests, Reader Content & More
Max Maxfield

Analog Faceplate Design Decisions: Art or Science?
Max Maxfield
19 comments
My degree is in Control Engineering -- a core of math with "surrounding subjects" of electronics, mechanics, and hydraulics and fluidics. The only official programming I did as part of ...

Jolt Judges and Andrew Binstock

Jolt Awards: The Best Books
Jolt Judges and Andrew Binstock
1 Comment
As we do every year, Dr. Dobb's recognizes the best books of the last 12 months via the Jolt Awards -- our cycle of product awards given out every two months in each of six categories. No ...

Engineering Investigations

Air Conditioner Falls From Window, Still Works
Engineering Investigations
3 comments
It's autumn in New England. The leaves are turning to red, orange, and gold, my roses are in their second bloom, and it's time to remove the air conditioner from the window. On September ...

David Blaza

The Other Tesla
David Blaza
5 comments
I find myself going to Kickstarter and Indiegogo on a regular basis these days because they have become real innovation marketplaces. As far as I'm concerned, this is where a lot of cool ...