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daleste
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re: DesignCon: "Uncomplaining" engineers must demand better EDA tools
daleste   1/30/2013 3:49:06 AM
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As our products grow, the simulations to verify them grow exponentially. Fortunately, those new more powerful chips are now running our computers. The only way to keep ahead is to partition the design and simulate smaller blocks first. Once that is done, you can simulate the entire chip using functional models instead of full designs of the blocks. Timing analysis is still the big issue at the end of the design.

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