Embedded Systems Conference
Breaking News
Comments
Newest First | Oldest First | Threaded View
Page 1 / 4   >   >>
resistion
User Rank
Author
re: GloFo, Samsung in race to 14nm
resistion   6/12/2013 11:52:33 PM
NO RATINGS
All indications are Intel will use multiple patterning without EUV for 10 nm. The other foundries will likely follow.

resistion
User Rank
Author
re: GloFo, Samsung in race to 14nm
resistion   6/12/2013 3:57:19 PM
NO RATINGS
http://www.theregister.co.uk/2013/05/29/euv_lithography_still_out_there/

resistion
User Rank
Author
re: GloFo, Samsung in race to 14nm
resistion   2/12/2013 1:47:24 AM
NO RATINGS
DRAM companies already moving on to 2x nm, so they're not waiting for EUV either.

help.fulguy
User Rank
Author
re: GloFo, Samsung in race to 14nm
help.fulguy   2/11/2013 11:33:07 PM
NO RATINGS
Bunch of losers. Ages behind Intel.

resistion
User Rank
Author
re: GloFo, Samsung in race to 14nm
resistion   2/9/2013 2:21:27 PM
NO RATINGS
It can't be gate length anymore but it might be fin CD.

Plasmon
User Rank
Author
re: GloFo, Samsung in race to 14nm
Plasmon   2/9/2013 12:39:59 PM
NO RATINGS
"7nm" is the name of the node, not the CD needed to print. See ITRS roadmap or Wikipedia for details. Thanks

michigan0
User Rank
Author
re: GloFo, Samsung in race to 14nm
michigan0   2/8/2013 7:40:17 AM
NO RATINGS
Scalability of the planer bulk technology ends at 28nm because world major foundries; TSMC, Samsung, GlobalFoundries, and UMC all get on to Intel’s FinFET bandwagon after falling behind Intel. They all plan to introduce FDFinFETs at 14nm node in 2014, skipping the 22nm, at the same time of Intel’s 14nm introduction. The foundries schedule looks unrealistic, and planed aggressively not to behind falling too far behind Intel. It leaves IBM being the only major company adopting FDSOI scaled to 10nm. For 22nm FDSOI about 6nm SOI thickness is required to suppress transistor leakage current, while for 22nm FDFinFET the fin width as large as 22nm is required to suppress the transistor leakage current. In my opinion that is the main reason why Intel’s 22nm FinFETs are in high volume manufacturing today for more than a year, but 22nm FDSOI is not. For 14nm FDSOI about 4nm SOI is required while for 14nm FinFETs the fin width as large as 14nm is required to suppress transistor leakage currents. Thus, FDFinFETs show large advantages in manufacturability as transistor is scaled. Soitec can deliver today only the 28nm SOI wafers with 12nm SOI and 25nm buried oxide. Skim

Diogenes53
User Rank
Author
re: GloFo, Samsung in race to 14nm
Diogenes53   2/8/2013 3:46:36 AM
NO RATINGS
Some of us have been saying for years that the pursuit of x-ray lithography, whether hard x-ray (~1nm) or soft x-ray (~13nm), a.k.a. EUV, was a supreme waste of millions of man-hours and billions of dollars. There were source/mask/resist issues 25 years ago, and there are source/mask/resist issues today. The pursuit of shiny penny alternatives continued, each of them with source, mask, and/or resist issues. The latest distraction is direct self-assembly. Good luck with that. Meanwhile, the choice was clear: shut down Moore's Law and its replenishable pot of gold, or extend optical. If optical was to be extended beyond what most folks thought possible, it would be essential to integrate design and manufacturing, which would result is the re-integration of the disaggregated semiconductor industry, and consequently, the ultimate supremacy of the old-fashioned IDM. Wonder if EUV/x-ray will be ready at 500 angstroms? Let's see: how large will the OPC features be. Or is that XPC?

mranderson
User Rank
Author
re: GloFo, Samsung in race to 14nm
mranderson   2/8/2013 3:13:46 AM
NO RATINGS
I would say that there are several more customers. People are willing to pay for advances in consumer and industrial electronics, but more products will become commodities with only software and firmware to provide differentiation. Many cell phone designs are already starting to look and feel similar to each other. I would not be surprised though to see people sneak in a special 28nm chip for example into their designs for some hardware customization for say a 8 inch or larger tablet form factor device.

resistion
User Rank
Author
re: GloFo, Samsung in race to 14nm
resistion   2/8/2013 3:11:49 AM
NO RATINGS
Indeed,the benefit of vertical integration from silicon design to product.

Page 1 / 4   >   >>


Top Comments of the Week
Like Us on Facebook

Datasheets.com Parts Search

185 million searchable parts
(please enter a part number or hit search to begin)
EE Life
Frankenstein's Fix, Teardowns, Sideshows, Design Contests, Reader Content & More
Max Maxfield

ESC Silicon Valley 2015 Sneak Peek! Using Arduinos & ChipKITs for Rapid Prototyping
Max Maxfield
Post a comment
When it comes to my hobby projects, I'm a huge fan of Arduino and ChipKIT microcontroller development boards. One of the big attractions is the huge ecosystem that's grown around these ...

Bernard Cole

A Book For All Reasons
Bernard Cole
1 Comment
Robert Oshana's recent book "Software Engineering for Embedded Systems (Newnes/Elsevier)," written and edited with Mark Kraeling, is a 'book for all reasons.' At almost 1,200 pages, it ...

Martin Rowe

Leonard Nimoy, We'll Miss you
Martin Rowe
5 comments
Like many of you, I was saddened to hear the news of Leonard Nimoy's death. His Star Trek character Mr. Spock was an inspiration to many of us who entered technical fields.

Rich Quinnell

Making the Grade in Industrial Design
Rich Quinnell
16 comments
As every developer knows, there are the paper specifications for a product design, and then there are the real requirements. The paper specs are dry, bland, and rigidly numeric, making ...

Special Video Section
After a four-year absence, Infineon returns to Mobile World ...
A laptop’s 65-watt adapter can be made 6 times smaller and ...
An industry network should have device and data security at ...
The LTC2975 is a four-channel PMBus Power System Manager ...
In this video, a new high speed CMOS output comparator ...
The LT8640 is a 42V, 5A synchronous step-down regulator ...
The LTC2000 high-speed DAC has low noise and excellent ...
How do you protect the load and ensure output continues to ...
General-purpose DACs have applications in instrumentation, ...
Linear Technology demonstrates its latest measurement ...
10:29
Demos from Maxim Integrated at Electronica 2014 show ...
Bosch CEO Stefan Finkbeiner shows off latest combo and ...
STMicroelectronics demoed this simple gesture control ...
Keysight shows you what signals lurk in real-time at 510MHz ...
TE Connectivity's clear-plastic, full-size model car shows ...
Why culture makes Linear Tech a winner.
Recently formed Architects of Modern Power consortium ...
Specially modified Corvette C7 Stingray responds to ex Indy ...
Avago’s ACPL-K30T is the first solid-state driver qualified ...
NXP launches its line of multi-gate, multifunction, ...
Radio
LATEST ARCHIVED BROADCAST
EE Times Senior Technical Editor Martin Rowe will interview EMC engineer Kenneth Wyatt.
Flash Poll