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resistion
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re: Flash will ride DRAM bus in 2014, says Micron
resistion   2/12/2013 2:26:29 PM
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It's rife with errors, like where did they get 10 nJ per bit for NAND? And STT needs transistor isolation, that's at least 6F^2. MLC is not even an option with low MR ratio.

rick merritt
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re: Flash will ride DRAM bus in 2014, says Micron
rick merritt   2/12/2013 6:39:00 AM
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It's a Micron foil

rick merritt
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re: Flash will ride DRAM bus in 2014, says Micron
rick merritt   2/12/2013 6:37:42 AM
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@dnh I used foils provided by Micron at the largest size we can accommodate (did you note you can "click to enlarge" them?) Can you provide more specifics on what you would like to see improved? Also, don't hesitate to email me at rick.merritt@ubm.com

dnh
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re: Flash will ride DRAM bus in 2014, says Micron
dnh   2/11/2013 8:17:01 PM
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The placing of Flash on the DIMM is an exciting development, with the potential of greatly improving PC performance. Unfortunately the figures in this article are so bad that it lacks credibility: What is 25M ns? Is that 25ms? Also the figures appear to be scanned in at a low resolution and are very hard to read, especially in the General/PrintView. While this is unfortunately typical of EETimes articles, the author of a post is responsible for his/her own postings. Rick Merritt - please fix your own post, and try to exert your influence to fix this generic problem.

resistion
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re: Flash will ride DRAM bus in 2014, says Micron
resistion   2/10/2013 4:41:38 PM
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I've always felt DRAM and NVM (i.e., Flash) had different applications, almost exclusive of each other. Generally, I don't expect what is buffered in DRAM to be stored directly, nor what has been stored to be directly read into a DRAM buffer.

EFosters
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re: Flash will ride DRAM bus in 2014, says Micron
EFosters   2/9/2013 7:56:00 PM
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Sounds similar to what Spansion and Virident tried to do a few years back, but with NOR. EcoRam DIMMs.

krisi
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re: Flash will ride DRAM bus in 2014, says Micron
krisi   2/9/2013 3:30:14 PM
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Memory world is getting to be interesting...

bberg950
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re: Flash will ride DRAM bus in 2014, says Micron
bberg950   2/8/2013 6:39:12 PM
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Viking Technology's ArxCis-NV has this same basic architecture for DDR3, and it is on the market now.

vshadan
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re: Flash will ride DRAM bus in 2014, says Micron
vshadan   2/8/2013 5:54:43 PM
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FLASH requires ERASE and WRITE, Just the WRITE is much longer time than DRAM's WRITE. How is that taken care?

resistion
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re: Flash will ride DRAM bus in 2014, says Micron
resistion   2/8/2013 5:46:35 PM
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Micron also working with AgigA on NVDIMM http://www.xbitlabs.com/news/memory/display/20121114132456_Micron_and_AgigA_to_Develop_Non_Volatile_DIMM_Technology.html

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As data rates begin to move beyond 25 Gbps channels, new problems arise. Getting to 50 Gbps channels might not be possible with the traditional NRZ (2-level) signaling. PAM4 lets data rates double with only a small increase in channel bandwidth by sending two bits per symbol. But, it brings new measurement and analysis problems. Signal integrity sage Ransom Stephens will explain how PAM4 differs from NRZ and what to expect in design, measurement, and signal analysis.

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