As signals are always aiming for lower power, the issue of noise from external sources especially during testing becomes a larger concern. So I often hear that BIST (built-in self-test) will be playing a bigger role. But I doubt BIST can do a thorough job without adding more cost to the chip. It's going to be pay now or pay later, no matter what.
Test gets no respect from management, because from management's perspective, testing only finds problems (usually shortly before the product is to be delivered because the design phase over-ran). Never mind that the product will be better, someone's bonus is on the line!
TE in a leading tech chip company get decent respect.
when the 1st silicon get some nasty bugs, everyone is watching at TE to show them some hope or trace of hope.
for a mature node, TE job is just wiping ass.
Blog Doing Math in FPGAs Tom Burke 18 comments For a recent project, I explored doing "real" (that is, non-integer) math on a Spartan 3 FPGA. FPGAs, by their nature, do integer math. That is, there's no floating-point ...