A great question. And I must say, when I attend ISSCC and other such conferences, I am always struck with how much technical detail engineers are willing/able to share with a room fully of other engineers, some of whom happen to work for their fiercest rivals. It's got to be a delicate balance. I must also say that I too have observed presentations by Samsung where the presenter did not appear to want to answer detailed questions. Not faulting Samsung for this, but perhaps it is part of that particular company's policy.
I remember this presentation. I was there. Yongmin also talked about body biasing both forward and reverse to boost performance and reduce leakage respectively. So I got to the mic and asked him if they applied body biasing on both pmos and nmos devices or only one of them. He refused to answer. I asked him if he could at least shed some light on how much leakage decrease or what performance boost he got. Again, he refused to answer. Mr Shin was right on one point this is a circuits conference. A conference which is place where you come to share your technologies and ideas and help advance the field. This paper should not have been selected. You cannot mention you tried various power saving schemes without a mention of what the benefit was. The presentation seemed more like a press release rather than a conference presentation. ISSCC should send a clear message. If you want to present here - you have to share information. You cannot use it as a platform to only advertize your wares.
In Mr. Shin's defense, he was probably forced to not reveal anything.
Read Anand's article about the Exynos Octa: http://www.anandtech.com/show/6768/samsung-details-exynos-5-octa-architecture-power-at-isscc-13
Around 5W max power for quad 1.8GHz A15 cores is actually amazingly low. That's just 1.25W per core.
If anything, the large difference in power between A7 and A15 means that big.LITTLE has achieved its goal. Most of the time you will be running on the A7 cores, thus using only a fraction of the power (about 0.5W for 4 1.2GHz A7 cores according to the graph).
What are the engineering and design challenges in creating successful IoT devices? These devices are usually small, resource-constrained electronics designed to sense, collect, send, and/or interpret data. Some of the devices need to be smart enough to act upon data in real time, 24/7. Specifically the guests will discuss sensors, security, and lessons from IoT deployments.