If I may muddy the waters even further, the acronymns "ASIC" and "SoC" have often been used by digital designers to describe design methodologies that are largely independent of a target "application" or one's concept of a "system."
By that I mean that some of us have, for years, used what we referred to as an "ASIC methodology," which simply meant that digital logic was synthesized from RTL to standard library cells and then automatically placed & routed -- i.e., few or no custom cells of our own creation and little or no manual intervention in physical design.
An "SoC methodology" was essentially a type of ASIC methodology, but included one or more large IP cores -- typically microprocessors -- that might be integrated as hard cells or might be synthesized & placed & routed using an IP provider's RTL, scripts and guidance.
The concept of an analog ASIC or analog SoC of course doesn't fit either of my methodology descriptions, although some of today's very complex AMS designs might.
Like I said, just muddying the waters with further abuse of those overly-used acronyms!
Blog Doing Math in FPGAs Tom Burke 18 comments For a recent project, I explored doing "real" (that is, non-integer) math on a Spartan 3 FPGA. FPGAs, by their nature, do integer math. That is, there's no floating-point ...