A spokesperson for TSMC has told me that they won't be putting out any SEM cross-sections of the 16FF process until ICs made using the process have been sold.
Once that happens third parties can buy some chips, take a saw to a chip and take their own microphotographs. So TSMC may leave it up to those third parties or release some of their own.
"New ARM Architectures for Servers: 64 bit, Virtualization, and Energy Efficiency".
I want to see cross sections.
I want to know Fin height variations within a die and across the wafer.
I don't need some marketing BS
On April 9, ARM talk on "New ARM Architectures for Servers: 64 bit, Virtualization, and Energy Efficiency". Attend event in San Jose or on-line: http://sites.ieee.org/scv-cs/ by IEEE Computer Society Santa Clara Valley
"The test chip was implemented using a commercially available tool chain and design services provided by companies associated with ARM and TSMC."
Did TSMC provide by any chance SEM cross sections?
I am curious about fin height variations for example
what's the shape look like?
Do they look similar to Intel
As we unveil EE Times’ 2015 Silicon 60 list, journalist & Silicon 60 researcher Peter Clarke hosts a conversation on startups in the electronics industry. Panelists Dan Armbrust (investment firm Silicon Catalyst), Andrew Kau (venture capital firm Walden International), and Stan Boland (successful serial entrepreneur, former CEO of Neul, Icera) join in the live debate.