both are a single point star ground, one is just more distributed than the other :-)
and then you have , vias and components on both sides of the board,
all good fun.
My mark one eye ball rule of thumb is like yours.
Look at the currents, keep di/dt low.
and break every other rule at some point or other
Much depends on the power output level of the switcher. The simplified drawing in the article shows the typical single phase SMPS chip with on-chip gate driver. With literally dozens of chips to choose from this approach reaches its practical limit around 150W. For these middle-to-lower wattage supplies a single ground consisting of a compact star ("single point") topology is adequate, but a ground plane is preferred for best EMI performance. Much above the 150W (or so) level a separate gate driver device will greatly help decouple switching transients from the SMPS chip - this is where a two-mesh power and signal ground approach is necessary. In these designs the signal ground will host the SMPS chip and associated bias and feedback scaling/filtering circuits. These larger designs also tend to be poly-phase so a separate power ground is especially important to keep the multiple high current paths away from the control circuitry. The power ground is common to the gate driver, current sense, input capacitor(s) and OVP. Of course in isolated designs like flybacks there's almost always a third isolated "ground" on the output.
Probabaly the reason why heated debates emerge is because no one pat rule ever seems to work across the board (ha ha, what a pun).
I agree with the comment that a ground plane amounts to a large area single-point ground.
Thing is, whether on a single card, or in a large system of components, I guess the one basic goal is to minimize ground currents. And the knee-jerk reaction of isolating grounds doesn't always work, to this end, because then your risk frying components when their zero volt references drift too far apart.
One good solution is fiber optics.
Blog Doing Math in FPGAs Tom Burke 23 comments For a recent project, I explored doing "real" (that is, non-integer) math on a Spartan 3 FPGA. FPGAs, by their nature, do integer math. That is, there's no floating-point ...