I always considered HDL( Verilog/vhdl) as a more reality-based type of extensively parallel SW programming :-)
Had an interviewer once get agitated when I told him I thought there are similar paradigms in both HW and SW design. He twitched some when I said I like to do both. But we grew up on the Steve Ciarcia/CircuitCellar days. -Lee Studley
Blog Doing Math in FPGAs Tom Burke 18 comments For a recent project, I explored doing "real" (that is, non-integer) math on a Spartan 3 FPGA. FPGAs, by their nature, do integer math. That is, there's no floating-point ...