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re: ST turns to PCM for MCU embedded memory
resistion   5/21/2013 10:40:07 PM
Each cell would require mA's of current at 90 nm.

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re: ST turns to PCM for MCU embedded memory
resistion   5/18/2013 6:04:55 PM
True, retention less than an hour.

Ron Neale
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re: ST turns to PCM for MCU embedded memory
Ron Neale   5/18/2013 9:32:33 AM
With the spin dial always set a maximum when presenting to analysts it would appear that some lessons of the past have been forgotten; blinded perhaps it would appear by the rosy glow of PCM futures selling. The long and more recent history of phase change memory (PCM) has been plagued by claims that Flash memory will not scale, the problem it did and still does. Moving the target from NAND to NOR is again just asking to be proved wrong. I guess the analysts failed to ask the question what is now different in the approach of ST now and why will it not result in the same end point, i.e. the failure of Numonyx and its absorption into Micron. Especially if some of the same cast of characters are involved. Prototyping PCM at 90nm, for 2013, with a 55nm Flash NOR ready for production is an interesting approach. The long search for amorphous PCM materials (inherently meta-stable) that offer thermal stability is again part of PCM history. There is from ST an implied prediction that for the 28nm lithographic node embedded PCM their “progress” will have yielded a result, with a device suitable for all three application areas by 2016. It would also be useful to know what the embedded PCM will offer over the flash NOR, that is the USP. While there is no mention of the planned memory bit capacity for the target applications; from a competitive viewpoint it would appear that MRAM and FeRAM are likely to be serious competitors, whereas for 1Gb they still have some way to go vis-a-vis PCM. It is interesting that for pre-programmed devices it is suggested that melting is the problem. The crystallization temperature for PCM materials is always lower than the melting temperature so I would have thought bits in the pre-programmed amorphous state would be more vulnerable to the effects of soldering.

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re: ST turns to PCM for MCU embedded memory
greenpattern   5/17/2013 3:32:41 PM
It's not likely they will meet the 125 C spec.

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re: ST turns to PCM for MCU embedded memory
resistion   5/17/2013 2:39:37 PM
28 nm CMOS core voltage not enough to drive PCM.

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