Would 3-D stacking of chips be really necessary for Altera at 14 nm from Intel - unless they decide to put SERDES on separate chips ? In that case who would stick / stack them together ? Intel / OSATs ?
They are not saying.
Xilinx has been more vocal on this front
Although Huawei did talk about what it is doing with Altera
There was no processor mentioned for the 14nm part. Is that an SOC or plain vanilla FPGA? What happened to their current generation of products? It would be interesting to see how the 20nm part got its performance boost compared to the current gen SOC. I think their current gen ARM is ~1GHz and they claim 1.5GHz for the 20nm part. You have to do some custom layout to get 50% gain.
I think Altera has put themselves into a really good position recently in terms of future hardware and their existing software.
A lot of people are interested in these new parts despite the costs. It is much easier to design and implement a board with one fpga than to have to use multiple fpgas.
Altera's main competitor is Xilinx, not these other companies. Altera using Intel fabs is a big deal.
Altera talked about 2X performance gain or 70% lower power at same performance (vs 28nm). If true, sounds like they use Intel's uPC process for max performance boost. Won't be surprised finding Intel processor embedded later.