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resistion
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CEO
re: IMEC helps scale NAND flash below 20-nm
resistion   6/21/2013 10:34:22 PM
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A 25 nm thick dielectric is attractive electrically but not obviously below 20 nm.

NAND rules
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re: IMEC helps scale NAND flash below 20-nm
NAND rules   6/23/2013 8:55:29 AM
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easy to scale below 2x node. doing 3 bits / cell at reliability spec is different. most of our development is now focused on 3D NAND vs scaling below 2x node.

resistion
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CEO
re: IMEC helps scale NAND flash below 20-nm
resistion   6/23/2013 11:46:47 AM
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I was a bit surprised no one announced sub-19 this year.

FraAmelia
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re: IMEC helps scale NAND flash below 20-nm
FraAmelia   6/24/2013 8:51:49 AM
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I agree with NAND Rule. @20nm and below (I mean in BL and WL direction) It does not make any sense to speak about absolute reliability standard for the NAND (10 years, 3k or 50k or 100k cycles and at which T?). It depends on the use cases and the bib NAND users (A,SS) know it well...

resistion
User Rank
CEO
re: IMEC helps scale NAND flash below 20-nm
resistion   6/24/2013 10:13:33 AM
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I'd be interested either way the appearance of sub-19 or 3d nand.



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