Design Con 2015
Breaking News
Comments
Newest First | Oldest First | Threaded View
DuologHarry
User Rank
Rookie
Standards for IP Integration
DuologHarry   7/23/2013 12:19:29 PM
There are some standards that are designed to make IP Integration esier, such as IP-XACT (IEEE-1685). It's hardly perfect (in fact is it undergoing some significant enhancements), but IP-XACT does enable the capture of all the register information, modes, interfaces, etc. to enable IP to be "packaged" for integration. Tool such as those from Duolog (full disclosure - I work there) can use IP-XACT data to integrate the IP automatically, e.g. construct the full chip memory map or stitch together subsystems and systems.

Some of the larger IP companies have embraced IP-XACT, but the smaller ones seem to lag behind. I think it's mostly a manpower issue for them, but it could be solved quite easily with some automated tools.

patrick.mannion
User Rank
Staff
Re: The Wrong Question?
patrick.mannion   7/1/2013 9:11:38 AM
NO RATINGS
It's a great question at the right time, Brian. So much more could be accomplished if progress was made here. I like what Synopsys is doing, but it's a point solution. Still, with so much innovation happening at the IP level and so many divergent needs. i have a hard time seeing any real standards evolving any time soon.

DrFPGA
User Rank
Blogger
The Wrong Question?
DrFPGA   6/29/2013 6:37:42 PM
NO RATINGS
Perhaps we are asking the wrong question.

Do you really want to test and verify the IP you add to your system? Is there a way to define/partition IP in such a way that it is 'correct by construction' when added to a system?

Maybe we can create IP using a standard interface, a standard protocol and 'higher level' operations that dramatically simplify the 'integration' process. Perhaps simplify it so much we don't really need to worry about 'integration' any more? Then we have a real solution...

Is this a possibility? Any work going on along these lines anywhere out there anywhere?

RichQ
User Rank
Staff
Test is important
RichQ   6/29/2013 3:15:29 PM
NO RATINGS
When you integrate IP into an SOC, one of the things you will need is test vectors for ensuring that the block you added is performing as expected. Happily, there is a standard now out that might help. It's the new JTAG IEEE 1149.1-2013. This is an extension of the boundary scan architecture defined for board test long ago, intended to simplify internal IC test. As I understand it, it allows IP developers to define JTAG testing for the boundary of their block, and have the test vectors they develop able to be dropped unchanged into a larger test program. This should simplify creating the necessary test patterns for SOCs.

Here's a tutorial you can download (it's at a commercial site) that helps explain the latest version of JTAG.



Top Comments of the Week
Flash Poll
Like Us on Facebook

Datasheets.com Parts Search

185 million searchable parts
(please enter a part number or hit search to begin)
EE Life
Frankenstein's Fix, Teardowns, Sideshows, Design Contests, Reader Content & More
<b><a href=Betajet">

The Circle – The Future's Imperfect in the Present Tense
Betajet
1 Comment
The Circle, a satirical, dystopian novel published in 2013 by San Francisco-based writer Dave Eggers, is about a large, very powerful technology company that combines aspects of Google, ...

Max Maxfield

Recommended Reads From the Engineer's Bookshelf
Max Maxfield
2 comments
I'm not sure if I read more than most folks or not, but I do I know that I spend quite a lot of time reading. I hate to be idle, so I always have a book or two somewhere about my person -- ...

Martin Rowe

No 2014 Punkin Chunkin, What Will You Do?
Martin Rowe
2 comments
American Thanksgiving is next week, and while some people watch (American) football all day, the real competition on TV has become Punkin Chunkin. But there will be no Punkin Chunkin on TV ...

Rich Quinnell

Making the Grade in Industrial Design
Rich Quinnell
16 comments
As every developer knows, there are the paper specifications for a product design, and then there are the real requirements. The paper specs are dry, bland, and rigidly numeric, making ...

Special Video Section
The LT8640 is a 42V, 5A synchronous step-down regulator ...
The LTC2000 high-speed DAC has low noise and excellent ...
How do you protect the load and ensure output continues to ...
General-purpose DACs have applications in instrumentation, ...
Linear Technology demonstrates its latest measurement ...
10:29
Demos from Maxim Integrated at Electronica 2014 show ...
Bosch CEO Stefan Finkbeiner shows off latest combo and ...
STMicroelectronics demoed this simple gesture control ...
Keysight shows you what signals lurk in real-time at 510MHz ...
TE Connectivity's clear-plastic, full-size model car shows ...
Why culture makes Linear Tech a winner.
Recently formed Architects of Modern Power consortium ...
Specially modified Corvette C7 Stingray responds to ex Indy ...
Avago’s ACPL-K30T is the first solid-state driver qualified ...
NXP launches its line of multi-gate, multifunction, ...
Doug Bailey, VP of marketing at Power Integrations, gives a ...
See how to ease software bring-up with DesignWare IP ...
DesignWare IP Prototyping Kits enable fast software ...
This video explores the LT3086, a new member of our LDO+ ...
In today’s modern electronic systems, the need for power ...