The examples I gave all use device registers which the SoC configures at boot time and can reconfigure at run time. So the logic has volatile SRAM configuration like Xilinx/Altera rather than non-volatile anti-fuse or flash cells like Actel/MicroSemi. The SoCs I mention above all have flash memory for programs and fixed data -- this includes the code and data to configure the logic.
In the PSoC case, there's lots of configuration so there's lots of SRAM -- something Cypress has always excelled at.
What is teh technology behind small programmable blocks in Soc? FPGA requires anti-fuses, which is a special processing step. SoC is done in typical CMOS, so how can you get anything programmable (in a non-volatile sense) there?
A number of ARM-based NXP microcontrollers have a State Configurable Timer block which lets you create state machines for controlling counters and for serial pattern matching. Not anywhere as general-purpose as PSoC, but great for real-time input events and output waveforms from what I can tell from NXP presentations. These functions would otherwise require a CPLD or small FPGA.
Microchip has recently added Configurable Logic Cells to some 8-bit microcontrollers. From what I've seen, they're pretty limited but useful for things like interrupting based on a combination of input conditions. I think the idea is similar to PSoC where you combine various on-chip building blocks to make higher-level real-time functions so you don't have to find a microcontroller with that exact function built in, or else double the cost of your microcontroller by adding a CPLD or small FPGA.
Cypress PSoC does this. PSoC 5 has ARM Cortex-M3, PSoC 4 has ARM Cortex-M0. Both have analog and digital peripherals, including PLAs and 8-bit data path blocks. Very nice architecture IMO, and most configuration registers are fully documented.
As we unveil EE Times’ 2015 Silicon 60 list, journalist & Silicon 60 researcher Peter Clarke hosts a conversation on startups in the electronics industry. Panelists Dan Armbrust (investment firm Silicon Catalyst), Andrew Kau (venture capital firm Walden International), and Stan Boland (successful serial entrepreneur, former CEO of Neul, Icera) join in the live debate.