Breaking News
Comments
Newest First | Oldest First | Threaded View
Page 1 / 3   >   >>
double-o-nothing
User Rank
Rookie
Re: Blowing past Toshiba/SanDisk
double-o-nothing   8/18/2013 10:27:16 AM
NO RATINGS
resistion
User Rank
CEO
16 nm MLC = 19 nm TLC = 11 nm SLC
resistion   7/19/2013 10:03:50 PM
NO RATINGS
Not sure about TLC status, but if Samsung had 18 nm TLC they could be ahead of everyone. However the truly intrepid can march toward 11 nm and beyond.

mhrackin
User Rank
CEO
Re: How about other trade-offs?
mhrackin   7/18/2013 10:46:53 AM
NO RATINGS
I'm very familiar with the various countermeasures for dealing with the raw NAND flash limitations.  My preference as a systems architect is using integrated systems from suppliers who are major players in the IP arena of these algorithms; there are only a handful of companies that control the vast bulk of that IP, and most have partnerships with the others cross-licensing the IP.  Regardless, none of these are bullet-proof, and each innovation in NAND flash density requires another layer or two of protection.  Although the details of this latest die-shrink are not disclosed, I would imagine that it entails both geometry shrink AND level-splitting the MLC structure.  That combination will require a major increase in the controller complexity to maintain the same level of data and device reliability. IMO, even the present level of that reliability is marginal for highly-sensitive applications (think medical devices, secure servers, etc.).  Too many people view this technology as the "magic bullet" that side-steps all the limitations of electro-mechanical (HDD), not realizing that even these have to be used in redundant schemes (e.g. RAID or equivalent) to get the level of system availability needed.

any1
User Rank
CEO
Re: How about other trade-offs?
any1   7/18/2013 9:07:39 AM
NO RATINGS
I think that many of us are aware that NAND flash chips "wear out" over many read/write cycles.  And so companies employ various software algorithms to try to mitigate the physics of NAND device break down.  In some cases that means "bad" cells are excluded and not used hence the usable memory capacity is lower.

mcgrathdylan
User Rank
Blogger
Re: How about other trade-offs?
mcgrathdylan   7/17/2013 8:17:42 PM
NO RATINGS
Good questions. I wasn't aware that SSDs and memory sticks shrink in capacity. That's not something you hear a lot about. Would you agree that the tradeoffs are worthwhile?

mhrackin
User Rank
CEO
How about other trade-offs?
mhrackin   7/17/2013 12:06:00 PM
NO RATINGS
I'm curious as to what other performance parameters are impacted by this.  The specifics important to me relate to data reliablility and retention.  How many R/E/W cycles at the individual cell level?  Operating temperature range?  Noise margins?  The list goes on....  I know the transition to MLC required substantial improvements in the SW/controller algorithms to deal with these.  I suspect far too many users (and even design engineers) aren't aware of these limitations, and the consequences (e.g. even USB memory sticks wear out eventually and shrink in capacity during their service life, and the same is true of SSDs).

goafrit
User Rank
Manager
Re: Blowing past Toshiba/SanDisk
goafrit   7/17/2013 11:09:53 AM
NO RATINGS
>> Interested whether it also represents a lead over Samsung and Hynix.

Samsung does not seem to lead in any of these innovations. Yet, they find ways to catch up and redesign any industry. The move to lower feature size is excellent but over time, that will not be a major advantage. Anyone that figures out will be the long-term leader.

resistion
User Rank
CEO
Re: lowest cost?
resistion   7/17/2013 10:59:26 AM
NO RATINGS
If it were easy and not cost-increasing to process 32, 64 or more layers of cells, they could have done the 3D NAND at even larger, more mature geometries, like 65 nm or 90 nm.

Peter Clarke
User Rank
Blogger
Re: Blowing past Toshiba/SanDisk
Peter Clarke   7/17/2013 10:50:47 AM
NO RATINGS
The introduction of a flattened planar memory cell at 20-nm by Intel-Micron seems to be standing the companies in good stead for this move to 16-nm. Interested whether it also represents a lead over Samsung and Hynix.

 

These companies usually tend to compete hard even with engineering ennouncements

goafrit
User Rank
Manager
Re: Blowing past Toshiba/SanDisk
goafrit   7/17/2013 10:48:09 AM
NO RATINGS
Samsung generally does not move first in some of these new areas. They wait for someone to do all the hard works and then with their cash pile jump in and take over the market with volume and great pricing. Micro is a great company but NAND business may be very challenging now

Page 1 / 3   >   >>


Flash Poll
EE Life
Frankenstein's Fix, Teardowns, Sideshows, Design Contests, Reader Content & More
Rishabh N. Mahajani, High School Senior and Future Engineer

Future Engineers: Don’t 'Trip Up' on Your College Road Trip
Rishabh N. Mahajani, High School Senior and Future Engineer
3 comments
A future engineer shares his impressions of a recent tour of top schools and offers advice on making the most of the time-honored tradition of the college road trip.

Max Maxfield

Juggling a Cornucopia of Projects
Max Maxfield
19 comments
I feel like I'm juggling a lot of hobby projects at the moment. The problem is that I can't juggle. Actually, that's not strictly true -- I can juggle ten fine china dinner plates, but ...

Larry Desjardin

Engineers Should Study Finance: 5 Reasons Why
Larry Desjardin
39 comments
I'm a big proponent of engineers learning financial basics. Why? Because engineers are making decisions all the time, in multiple ways. Having a good financial understanding guides these ...

Karen Field

July Cartoon Caption Contest: Let's Talk Some Trash
Karen Field
144 comments
Steve Jobs allegedly got his start by dumpster diving with the Computer Club at Homestead High in the early 1970s.

Top Comments of the Week
Like Us on Facebook
EE Times on Twitter
EE Times Twitter Feed

Datasheets.com Parts Search

185 million searchable parts
(please enter a part number or hit search to begin)