Hi Janine, I am assuming that you are referring to different simulation platforms (like virtual-prototype, RTL simulator or emulators like Palladium) when you use the word "environment". These platforms provide different levels of observability and simulation-performance (sim-performance) throughput. For example: RTL simulators give better observability but low sim-performance while emulators give marginal observability but deliver on sim-performance. Depending upon the verification stage, platforms are chosen, for example initially RTL simulator is chosen as the scenarios one would run are simple and the expectation is more bugs will be flushed out at this stage. But when confidence on RTL is built, folks take it to emulation or Sim-accelerators for stress testing and benchmarking. Presently emulation vendors are improving observability and investing on transactional VIPs (partly synthesize-able) to re-use test-bench. My take, emulation platform may be the way to go but bottlenecks like compilation, cost etc will have to be addressed before it is adopted widely.
1. Typically SoC platform from companies have derivative platforms with some features added or removed. There seems to be redundancies/duplication of efforts in functional verification in these kind of scenarious which is potential areas for savings.
2. Placing higher priority to VP platform for system level verification makes sense. Getting software run on VP without issues can ensure lot of success to business. Key reason being time to market. Software stack is critically tested on VP, and running on hardware ensures minimal software issues.
3 If the software use/test case can capture details of the the components, registers, memory sections... from the entire state space that are activated, one can gain higher level of confidence in verifcation.
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