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DrFPGA
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Memory Bandwidth Can Be and Issue
DrFPGA   7/24/2013 3:53:21 PM
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Acceleration via FPGAs in a simple form factor with easy to use software can be a real enabler for a wide range of computationally challenging algorithms. In many cases the memory bandwidth needed to keep the accelerator running can be the bottleneck. Hopefully this implementation provides some high-bandwidth memory interfaces that can keep the computation running at full speed.

Robotics Developer
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Rookie
Re: Memory Bandwidth Can Be and Issue
Robotics Developer   9/19/2013 9:44:33 PM
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I wonder about the cost of the system?  It seems to be an interesting concept but I am not sure that it would be aimed at capturing a huge market.  I would think that the many FPGA development boards available from the vendors would provide a lower cost more portable design platform, but maybe at the cost of needing to learn VHDL or Verilog.  Seems to be a niche market product but it would be interesting to see how it compares cost and performance wise against a GPU board.

Sanjib.A
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CEO
Simulation vs implementation
Sanjib.A   7/26/2013 12:06:39 AM
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Good to learn about the tool that assists in understanding how well the hardware acceleration would run by doing a simulation. I have not used such tools before, sorry for asking a dumb question. I understand it does simulation, but how does it also create the program files for FPGA, or does it support in creating the HDL code for implementing the code for the actual FPGA hardware also?

rick merritt
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Author
Comments from users?
rick merritt   7/30/2013 11:20:59 AM
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It would be interesting to hear from anyone with hands on experience with this tool. What's your application? How well does this serve it?



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