Acceleration via FPGAs in a simple form factor with easy to use software can be a real enabler for a wide range of computationally challenging algorithms. In many cases the memory bandwidth needed to keep the accelerator running can be the bottleneck. Hopefully this implementation provides some high-bandwidth memory interfaces that can keep the computation running at full speed.
I wonder about the cost of the system? It seems to be an interesting concept but I am not sure that it would be aimed at capturing a huge market. I would think that the many FPGA development boards available from the vendors would provide a lower cost more portable design platform, but maybe at the cost of needing to learn VHDL or Verilog. Seems to be a niche market product but it would be interesting to see how it compares cost and performance wise against a GPU board.
Good to learn about the tool that assists in understanding how well the hardware acceleration would run by doing a simulation. I have not used such tools before, sorry for asking a dumb question. I understand it does simulation, but how does it also create the program files for FPGA, or does it support in creating the HDL code for implementing the code for the actual FPGA hardware also?