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kfield
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Great concept
kfield   7/27/2013 1:49:50 PM
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Wow, what a great concept to execute on once engineers identifed a need within the engineering community. I wonder how much input from that initial group of engineers went into the guide? I read an interesting article recently arguing that the best teachers of anything are the people who most recently learned the material -- once your expertise grows, you tend to forget what is was like at the beginning and what questions and challenges you had.

Frank Eory
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Turning software engineers into hardware engineers?
Frank Eory   7/29/2013 5:06:20 PM
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HLS source code is usually C++ or System C, and the applications where HLS works best are DSP applications, so on the surface, it seems logical that one would want to train the DSP software engineers in HLS.


But learning a tool is only a small step on a long journey. The end result of HLS is still a piece of hardware -- a large, complex digital logic design -- and just as with RTL design, the quality of the source code in HLS strongly influences the quality of results -- area, performance and power dissipation. An understanding of hardware and an understanding of how different source code constructs map differently into RTL and ultimately into logic gates will help a great deal in getting optimal results from HLS.

I'm not suggesting that software engineers can't learn to become hardware engineers, but rather that they actually should become hardware engineers if they want to successfully use HLS to create hardware.

MikeSantarini
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Re: Turning software engineers into hardware engineers?
MikeSantarini   7/31/2013 2:31:10 PM
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I don't think the point is turning software engineers into HW engineers--it's team productivity, TTM, etc. In related news for HW engineers, Xcell Journal 84 includes an indepenant benchmark of HLS submitted by Xcell readers in France: "Benchmark: Vivado's ESL Capabilities Speed IP Design on Zynq SoC." (knock on wood) We get a large percentage of our content for each issue out of the blue submitted by Xcell readers. This is a great feature with real numbers as well as lowdown on the good, bad and the not so ugly of HLS vs RTL. The bottomline is a huge productivity boost for HW engineers. Most commercial EDA ESL tools are a capital investment and reserved for the elite in IC design, HLS IMHO brings ESL to the masses. What's more it was the best of class of those Elite ESL tools, which is why Xilinx acquired it and refined it. At any rate here is the link http://issuu.com/xcelljournal/docs/xcell_journal_issue_84/34?e=2232228/4052461



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As data rates begin to move beyond 25 Gbps channels, new problems arise. Getting to 50 Gbps channels might not be possible with the traditional NRZ (2-level) signaling. PAM4 lets data rates double with only a small increase in channel bandwidth by sending two bits per symbol. But, it brings new measurement and analysis problems. Signal integrity sage Ransom Stephens will explain how PAM4 differs from NRZ and what to expect in design, measurement, and signal analysis.

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