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resistion
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CEO
Re: max density
resistion   8/6/2013 7:59:14 PM
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Assuming the 24 levels maximum, and a F=50 nm 6F^2 design rule, the maximum 3D density is equivalent to a conventional 12.5 nm floating gate. So the density lead for this case is temporary, until someone (if anyone) hits 10 nm floating gate. Increasing the number of levels or shrinking the 3D NAND design rule could increase costs when the number of steps starts multiplying, e.g., doubling.

_hm
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CEO
Cost, Density and Power
_hm   8/6/2013 7:42:51 PM
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That is a very good news for Samasung. It will be interesting to know cost, density and power advantage of this breakthorugh. Will this make future low cost laptop solidstate?

 

themassau
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Rookie
Re: Going vertical
themassau   8/6/2013 3:15:10 PM
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in the link they explain 3d nand. its more like building a skyscraper of nand cells than finfets.

http://semiaccurate.com/2013/07/16/applied-materials-talks-about-3d-nand-flash-production/

goafrit
User Rank
Manager
Re: Toshiba -SanDisk take a beating
goafrit   8/6/2013 2:55:21 PM
Have a lot of respect for Samsung. It is indeed one of the best tech firms in the world today. They move in and they begin to dominate. Excellent piece of execution.

rick merritt
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Author
Going vertical
rick merritt   8/6/2013 2:05:46 PM
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I'd love to hear a simple explanation of what this vertical cell technology is all about.

For example, does it relate to FinFETs in some way?

resistion
User Rank
CEO
Toshiba -SanDisk take a beating
resistion   8/6/2013 10:16:00 AM
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A little painful to see Micron and Samsung beating down Toshiba and SanDisk at this time, after their earlier statements. Maybe they'll come back with 10 nm.

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