Lower power yes, but in practise it is not that much different from CPU migration approach or indeed cluster migration (The graph is comparing against just using N/2 Big Cores).
The difference is that GTS gives the maximum peak performance (just) at the lowest power consumption (just) but at the expense of software complexity.
In practice it all depends on the applications (benchmarketing) and executing the task scheduling well and may not make that much difference. But it only takes a few minutes of battery life for a piece of equipment to become best-in-class in some review which might make all the difference in sales.
Peter, thanks for laying this all out in your crisp writing. It's one thing to get excited about the number of cores in a CPU, it's entirely another how much performance boost you get out of it. But as I see in the bar graph on the second page, the reduction of power seems to be the driving force behind the Global Task Scheduling method.
Great job plumbing these new depths in ARM-based SoC parallelism.
My 30,000-foot take away is it is getting increasingly hard for engineers to wring out more performance from more cores...and increasingly hard to explain to a smartphone/tablet consumer why one chip is better than another.
What are the engineering and design challenges in creating successful IoT devices? These devices are usually small, resource-constrained electronics designed to sense, collect, send, and/or interpret data. Some of the devices need to be smart enough to act upon data in real time, 24/7. Are the design challenges the same as with embedded systems, but with a little developer- and IT-skills added in? What do engineers need to know? Rick Merritt talks with two experts about the tools and best options for designing IoT devices in 2016. Specifically the guests will discuss sensors, security, and lessons from IoT deployments.