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Dias112
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Re: obsolescence of planner DRAMs in next 3-5 years?
Dias112   1/6/2014 3:41:24 AM
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Recently, a third process has become the focus of research, reconsolidation, in which previously consolidated memories can be made labile again through reactivation of the memory trace. Thanks for information.  statement of purpose for grad school



Sanjib.A
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obsolescence of planner DRAMs in next 3-5 years?
Sanjib.A   8/27/2013 1:48:55 PM
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Since the memory market is mostly dominated by the commercial market, which is always hungry for more memory at lower price, it is always tough for the folks who works in the industrial sector cope up with the fast pace of obsolescence of memory technology. Do the 3D DRAM or FLASH memory chips have same foot print to just replace the planner chips without the need to respin the boards?

MClayton0
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CEO
Re: Micron Sees Consolidation, Then Shifts
MClayton0   8/23/2013 3:45:49 AM
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Hope you all remember who started this company...a potatoe farmer that wanted to make something to compete with Japan, in the USA.  [ He also invented the frozen french fry process of freeze-drying, and supplied half of McDonald's fries for years.]

His question was "what kind of chip can I make that is like french-fries, high volume of same thing?" (My remembrance, not direct quote).  The answer was DRAM.  Next question, who is best engineer to make those? Look that up on web.

He made the cover of Fortune long ago.  J. R. Simplot.   Many stories about that startup, and about J.R.'s fun gambling with the cyclical stock with his cowboy buddies at the coffee shop. 

-------------------------- 

As far as 3D memory devices, I think some people call finfet a 3D device, others reserve that term for stacked die with thru-hole vias, and there may be more types using 3D handle.   Not sure which he is talking about.

NAND_analyst
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Re: End of bit cost reduction?
NAND_analyst   8/21/2013 11:35:29 AM
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Here is an excerpt from the Sandisk CC last month that summarizes one potential issue with 3D that will raise its cost:

Michael Bressler

Got it, okay. And my second question is on 3D NAND. When I was at Semicon West, I met with a leading inspection company and they told me that the problem with 3D NAND is that you don't inspect the product until it is finished. So if the defect is discovered in the middle of the stack, there is no way to correct for it. In the absence of great controller technology, how can this product ever be cost-competitive against leading-edge planar X3?

 

 

docdivakar
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Re: Micron Sees Consolidation, Then Shifts
docdivakar   8/21/2013 11:06:34 AM
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@RickMerritt: good interview!

The consensus at the recently concluded Flash Memory Summit was the same as what Mr. Adams is saying in the article -planar NAND as a few more generations left and will stay on in a sustaining mode having reached maturity.

I think 3-D NAND will eventually reach a stage where it will be cost-competitive, I agree it may not be in the short term. There is no denial that it has the space savings advantage.

MP Divakar

resistion
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CEO
Re: End of bit cost reduction?
resistion   8/20/2013 10:43:38 PM
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3D NAND doesn't seem to have the cost reduction benefit. It looks like it could have some endurance benefit. But the need for this benefit is not so high among consumers, especially mobile. So, as mentioned elsewhere, Samsung has wisely targeted enterprise. This is a deep-pocket technology for sure.

Dick James
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Re: End of bit cost reduction?
Dick James   8/20/2013 5:09:58 PM
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To me it's more a case of when it's sensible to spend the extra capex to start manufacturing. Micron's planar flash probably has one more generation in it, so there's no need to build capacity for another year or so, in anticipation of manufacturing two years from now.

Add in that Micron thinks that their 3D NAND will probably need a 30-layer stack to be equivalent to (say) 14-nm planar (as opposed to Samsung's 24 layers in their V-NAND), and it might be longer than that.

Once we get to 3D I think it will have some legs, at least the five years needed to depreciate the capex. Once a 30-stack is manufacturable, then presumably we can crank up the stack height to increase density.

DMcCunney
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CEO
Re: End of bit cost reduction?
DMcCunney   8/20/2013 1:39:59 PM
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Whether it's economic will depend on usage and demand.  Right now, it's a promising technology in search of a market.  I think Micron has the ability to make it.  Driving it into mass mobile volumesa will e a function of demand.  Does the mobile market currently need 3D NAND flash?

rick merritt
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Re: End of bit cost reduction?
rick merritt   8/20/2013 10:32:40 AM
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@Resistion: Yeah I wondered how much Adams/Micron are showing wise caution about tech that may have a low ROI or how much might be sour grapes if they don't have the ability to make/drive it into mass mobile volumes.

Thoughts?

resistion
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CEO
End of bit cost reduction?
resistion   8/20/2013 4:25:07 AM
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His comments on 3D NAND seem to indicate it is not so economic. Another process dead end possibly like what's happening lithographically.

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