Certainly, and thanks for asking. Since the voltage regulation loop appears as an indcutor there regulator with a capacitor forms an LC network. The ESR provides the majority of the damping. The charaxteristic impedance, Zo, of the LC circuit is SQRT(L/C) and the Q is defined as Zo/R. If R is mostly ESR and we set the Q to 0.5 for optimal damping you end up with the formula indicated.

The proliferation of local bypassing is indeed a problem. I work with layout people who lay down 100nF caps for every package whether I specify them or not. Sometimes they are needed, often not. When I have done other designs I will decouple with something like a 10 ohm resistor in series, which may still be too low depending on the regulator. This of course complicates matters as well if some stiff regulation at a particular load point is assumed and required. Also, the approximation to zero potential of a ground plane is just that, and mingling signal commons with power commons in the presence of rapidly fluctuating loads inducing currents through all of those bypass caps can spell disaster.

Sometimes the bast way to proceed is local fast shunt regulation, although it entails substantially higher quiescent current. But it can render local current fluctuations small enough to allow grounds to be shared, which is helpful at very high frequencies.

great points, thanks for sharing. Yes, we also often use high performance shunt regulators in sensitive applications, both because of the reasons you mentioned and also the superior noise and PSRR performance, but they are not efficient and so most designers avoid them without due consideration.

G'day all, I am a professional engineering undergraduate student in the degrees of Computer Systems Engineering and Computer Science at Curtin University of Western Australia.

I was taught (and I have read in many books on control system theory), that the definition of a fully-stable system is one in which one or more bounded inputs to the control system (i.e. The transfer function), results in one or more bounded outputs (for SISO and MIMO systems). Put another way if a finite input results in a finite output; put yet another way (in terms of the impulse response of said system), if the impulse response of the system tends to zero after "some" time.

You can have marginally stable systems where the impulse response tends to some finite non-zero value but never goes to zero. Hence a system is unstable (in terms of the impulse response), if the impulse response reaches infinity after a certain time. [Ref: "Electronic Devices and Amplifier Circuits with MATLAB computing", Second Edition by Steven T. Karris, Orchad Publications 2008 [ISBN-13: 978-1-934404-14-0, ISB-10: 1-934494-14-4].

Sidenote: The impulse response in the digital domain is simply a vector (of necessary length (n)), that contains a 1 followed by n-1 zeros.

With respect to the ringing due to the output capacitor, this is entirely predictable I thought. Without the capacitor (in combination with the output impedance), you have all frequencies passing through (due to the input of Dirac-delta function equivalents at the start and end of the square wave pulse), resulting in an approximation of a theoretical impulse (we are in the analog (or analogue) world now :)). With the capacitor much of the high-frequency components have been filtered (passed-through to ground) but some low-pass signals have passed through. In any case the system (or more commonly subsystem) still appears fully-stable in theory as the output voltage is tending to zero; the problem comes when this is inputted into the next stage. This is all undergraduate stuff so I must be missing something!?!?

With regards to not being able to measure something in one's design; if you can't measure it you can't test it and if you can't test it then you may be in trouble. One would have to go back and think how do I know the existence of something that can't be measured? In general it is because some [acceptable number of] mathematician/physicist says it has to be there in theory. One may have to look at what the unmeasurable object affects, with a view to being able to measure the effects and work backwards with theory (math).

You are mostly, but not entirely correct. The stability definition you presented is reasonable, the question is the metric for quantifying the margin of stability, which in most cases is the closest proximity of the gain vector to the singular unstable point (1,0).

The ringing is not quite preditcable, as it has much to do with the degree and Q of the open loop, which is often unknown. The issue is particularly troublesome in circuits where the loop is not accessible for measurement. This is often the case with class D monolithic audio amps, voltage references and fixed voltage regulators to name a few. So for example if you look at a LDO datasheet and it says stable for capacitors from 1uF to 100uF what exactly does this mean? Will the circuit ring? If so, how much and do we care?

I'm currently writing a new book for McGraw-Hill on high fidelity measurement and it will address some of these issues and how they propagate through systems. The book should be submitted to the publisher in early 2014.

The point of this article is that we should be concerned about even a little bit of ringing (especially in a high performance system) might rwreak havoc on the performance.

In conjunction with unveiling of EE Times’ Silicon 60 list, journalist & Silicon 60 researcher Peter Clarke hosts a conversation on startups in the electronics industry. One of Silicon Valley's great contributions to the world has been the demonstration of how the application of entrepreneurship and venture capital to electronics and semiconductor hardware can create wealth with developments in semiconductors, displays, design automation, MEMS and across the breadth of hardware developments. But in recent years concerns have been raised that traditional venture capital has turned its back on hardware-related startups in favor of software and Internet applications and services. Panelists from incubators join Peter Clarke in debate.

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