Babson's Daniel Isenberg authors "Worthless, Impossible and Stupid: How Contrarian Entrepreneurs Create and Capture Extraordinary Value" Since it was published by Harvard Business Review Publishing, it has risen to the top ranks on Amazon books and has been positively reviewed or featured in the Economist, USA Today, Wall Street Journal, Financial Times, Forbes TV, Bloomberg, USA Today, Ventureburn, Entrepreneur.com and a number of radio programs.
The world is full of experts and speculation is cheap. We could fill a magazine with reports that "Moore's Law Dead by Year X, Expert Says." I've been reading such reports for years - and many of the stipulated dates have passed. It seems to me that we're playing a game of chicken. I guess Moore's Law will be dead by 2113, you guess 2063, someone else guesses 2022 (which is still a long way off) and wins the headline lottery for this week. It isn't news. The one positive outcome of this speculation is that it re-energizes the inventors to find one more creative way to eek out another doubling of performance, which benefits us all.
@rick merritt >> Regarding graphene (along with many other nano-particles) and toxicity at the human cell-level has been raised in the past few months (please google it and you may find the topic interesting). I also have issues with the "fact" that the only byproduct of hydrogen fuel cells is supposed to be water. Donald Rumsfeld 'poetry' regarding the Knowns and the Unknowns may hold true here (please google it and you may find that interesting also). Cheers
Indeed the economic stop seems to be a far more predicatable one than the technological stop. Not only will very few players be able to afford to build a fab or even tape out an IC in 7 nm or 5 nm or whatever the last CMOS node is, but it is also likely that very few ICs will command the enormous volumes required to justify the expense of developing them and getting them released to production.
@chipmonk0: "selective presentation of data ( graph showing saturation of clock rate ) only damages one's own credibility".
Thak you very much for your value judgement...
"As it should have been clear to you this is a Technical Forum and participants are well aware of clock - rate vs multi - processor arguments as options to deliver a certain GFlops"
I'm pretty aware of this, but not everybody share the same skills or knowledge. The graph is included in a blog that I wrote for the All Programmable Planet community, in which I tried to give a very simple physical explanation about why clock rates doesn't fit with Moore's law beyond a process limit despite the fact that transistor number does. If you are really interested, here you have the full history.
The "selective presentation of data" I expose was obtained & kindly shared by Dr. Colin Gillespie, from the Univerity of Newcastle -- UK. In his original blog, he explains how he collected and analyzed the raw data -- you can check it in deeper way if you want to.
"That train has long left the station"
I started working in the clock related problems in CMOS processes in year 2001.
From your comments, I deduce you are pretty interested in the Moore's Law demise or survival topic. I plan to be in the related EETimes week in review chat tomorrow... maybe shall I see you there?
@ Garcia - Lasheras : selective presentation of data ( graph showing saturation of clock rate ) only damages one's own credibility. As it should have been clear to you this is a Technical Forum and participants are well aware of clock - rate vs multi - processor arguments as options to deliver a certain GFlops. That train has long left the station.
Was n't it you yourself who reported a couple of weeks back on Samsung's 3D NAND -- stacked one cell on top of another on a single wafer ?
With time, such 3D technology will spread into processors and memory - processor combos as well. Though the cost per transistor may increase in such stacked devices due to cost of addition of isolation & vertical interconnects etc., the cost per system & power consumption would go down radically due to electrical reasons. How is that for not having to wait for adequate throughput from EUV but still stay on the growth path ?
Balanced, comprehensive and well-reasoned coverage is what we will keep depending on you for.
What are the engineering and design challenges in creating successful IoT devices? These devices are usually small, resource-constrained electronics designed to sense, collect, send, and/or interpret data. Some of the devices need to be smart enough to act upon data in real time, 24/7. Are the design challenges the same as with embedded systems, but with a little developer- and IT-skills added in? What do engineers need to know? Rick Merritt talks with two experts about the tools and best options for designing IoT devices in 2016. Specifically the guests will discuss sensors, security, and lessons from IoT deployments.