I am not sure there will be a introduction of greater amounts of germanium into current devices.
A believe germanium has been used as a dopant to induce strain in silicon and there are SiGe processes at what are now trailing edge geometries. But strained silicon CMOS is the workhorse process.
But I believe this research is really looking towards a new era and finer gometries where the transistors are in Ge with Sn used to generate strain and silicon is the substrate to allow backwards compatibiity and integration with CMOS and manufacture on economicaly dimensioned wafers.
Does research is tending us towards a Fast (Low transit time) and more dense electronic ICs? As the article is discussing about it I think this will also help improving the bandwidth of the current semiconductor based devices.
Blog Doing Math in FPGAs Tom Burke 4 comments For a recent project, I explored doing "real" (that is, non-integer) math on a Spartan 3 FPGA. FPGAs, by their nature, do integer math. That is, there's no floating-point ...