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LarryM99
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Color me skeptical
LarryM99   9/20/2013 5:27:25 PM
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I am really wondering how much of this is actual engineering optimization, as opposed to synchronization of marketing plans. Intel gets to claim an advantage in flash access time (Show me the numbers!) while SanDisk gets de facto design wins. I am also leery of single-sourcing for a component. That being said, maybe there is something here. I will be interestd in seeing third-party tests of this claim.

elctrnx_lyf
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Re: Color me skeptical
elctrnx_lyf   9/22/2013 7:30:39 AM
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There would be a possibility that contract between Intel and Sandisk would stop the later to not to sell the technology to any other tablet maker.

DMcCunney
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Re: Color me skeptical
DMcCunney   9/22/2013 5:17:36 PM
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Agreed on "show me the numbers".  I also note that this claim is specific to SanDisk's iNand Extreme package, which is presumably the high priced spread.

So the next question is "How many manufacturers are making tablets with Intel Inside that might be a customer for this?"

I await a SanDisk announcement of high-end flash optimized to work with current ARM designs...

Peter Clarke
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Re: Color me skeptical
Peter Clarke   9/23/2013 6:20:29 AM
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Or maybe it is the case that SanDisk iNAND Extreme is already optimized for ARM based designs and that some change has been made to benefit Bay Trail

LarryM99
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Re: Color me skeptical
LarryM99   9/23/2013 2:00:54 PM
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It could be, Peter. Either way it points up the fact that in the current tablet / handset market ARM is the 800 lb gorilla and Intel is the newcomer. The fact that it is a very well-heeled newcomer means that it can get some accomodations from established support players like SanDisk. It will be fun to watch to see if that translates to market success.

alex_m1
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general question?
alex_m1   9/21/2013 7:44:26 AM
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A general question: if you look at logic processes, the most economical one is 28nm, because it doesn't require double patterning. Why doesn't this apply to flash processes?

resistion
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Re: general question?
resistion   9/22/2013 10:21:53 AM
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Great question. Flash has used DP since 3x nm, they may have driven costs down little by little, layer by layer. DRAM also introduced layer by layer. Non-memory just getting started. I'm also surprised to hear complaints but maybe it's all about flexibility. Memory designs are restricted anyway.

alex_m1
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Re: general question?
alex_m1   9/23/2013 10:33:43 AM
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@resistion: Like you said it could be just issues of learning and flexbility needed. If so , that might mean that highly structured designs like fpga/easic would have major benefits when moving to next node. I wonder how far the easic structured asic form asic efficeny and how far a benefit in a single node would get them.



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