I doubt google will jump in at this level any time soon. they've typically partnered with a hardware vendor for this kind of stuff, like microsoft. I do know they have custom hardware made for their datacenters though.
Who knows with google, they don't tend to follow a narrow path forward, so they might decide to experiment with SoC development of their own.
It makes more sense to me this large on-chip RAM is L-3 Cache for DRAM controller directly next to it. If I am Apple, I will never store direct finger print data in anywhere. Because wherever you store, people will figure out. A good choice is to apply special imaging hashing function to it and only store hashing value. Not sure this technology exist today.
Looking at the layout, Apple appears to have used 1 DDR channel to feed the CPU and another channel for GPU data. The large SRAM above the GPU appears to be the embedded cache for graphics memory, which is similar to approach used by Intel's IRIS Pro and XBOX One
To store finger print data? You need to use NVM, not SRAM or you have to keep feeding power to the chip, which is not possible
Also for the CPU highlighted by chipworks, it appears that the complex includes 2 memory controllers from layout, so the actual area for the CPU complex (excluding the memory controller) is likely smaller than 17% or ~17 sq mm
As we unveil EE Times’ 2015 Silicon 60 list, journalist & Silicon 60 researcher Peter Clarke hosts a conversation on startups in the electronics industry. Panelists Dan Armbrust (investment firm Silicon Catalyst), Andrew Kau (venture capital firm Walden International), and Stan Boland (successful serial entrepreneur, former CEO of Neul, Icera) join in the live debate.