Although its write endurance is sufficient, it needs to demonstrate reliable read endurance as a SRAM or DRAM replacement. This will be hard to do for a fast read current, since read disturb is becoming more likely.
Another difficulty is the resistance-area product which is quite low at ~10 ohm-um2. In that case, the transistor must always be bigger than the MTJ, which is hard to sell. But for advanced nodes, even the interconnect resistance will be of the same order of magnitude.
So I think its burden for entry is quite high and getting higher.
Memristor was the name ascribed to a theoretical two terminal variable resistence device by Leon Chua. The term was picked up and used by Hewlett-Packard who have worked on two-terminal memories.
However, in practice the landscape is very complex with numerous different materials systems being studied and the possibiity of multiple physical, chemical and quantum mechanical effects in play at the same time.
What is called "resistance switching" is a sort of phenomena. Under certain conditions, "resistance switching" behavior can be brought about in various metal/insulator/metal structures after a soft-breakdown of the insulating material has occurred. Such effects could offer the potential for nonvolatile memory applications (ReRAM or RRAM). "Resistance switching" phenomena are well known since decades /1/ and are in no way related to the concept of "memristor/memristive" systems. Nevertheless, there is ongoing research because there are still a lot of questions with respect to the underlying physical mechanisms. Understanding into the probabilistic nature of the "resistance switching" operation is, for example, crucial to get grip on reliability issues of ReRAM devices.
What is called "memristor" is a sort of hypothetical concept. "Memristors" are conceptually defined by a unique set of characteristic mathematical state equations – based on the mathematical framework proposed by L. Chua /2/. Thus, solid state memory devices should only be labeled "memristors" if one is able to propose a reasonable physical model that satisfies these state equations.
Any scientific evidence that "memristors" might exist in physical reality is missing so far. HP's "memristor" model which was presented in 2008 in the NATURE paper "The missing memristor found" /3/ is, e.g., based on severe electrochemical misconceptions: one cannot derive the characteristic dynamic state equations of a "memristor" on base of HP's dopant drift model, i.e., no memory devices can operate in accordance with the model because the model is by itself in conflict with fundamentals of electrochemistry /4/. Thus, up to now nobody has invented or found a memory device which operates like a genuine nonvolatile "memristor".
Moreover, the nonvolatile "memristor" concept raises some severe questions when viewed from the perspective of non-equilibrium thermodynamics /4, 5/. Nonvolatile information storage requires the existence of energy barriers that separate distinct memory states from each other. "Memristors" whose resistance (memory) states depend only on the current (like the HP memristor) or voltage history would thus be unable to protect their memory states against unavoidable fluctuations and therefore permanently suffer information loss:the proposed hypothetical concept provides no physical mechanism enabling such systems to retain memory states after the applied current or voltage stress is removed. Such elements can therefore not exist, as they would always be susceptible to a so-called "stochastic catastrophe" /5/. It is therefore pointless to tinker with this concept in order to describe physical phenomena like "resistance switching" effects.
Thanks - skeptic. There is much information in your reply.
I just read several papers on this. It is interesting to find that even the whole paper is talking about a phenomenon which can be explained by the known classical semiconductor physics principles, there is always a "memristor" word in the title. For example, the papers from one group from the University of Michigan, who recently announced the release of a chip based on such a concept (a so-called Crossbar comapny).
"Memristor" looks like a new thing from "resistor, capacitor and inductor", but unfortunately I can find nothing new in these papers. They talked the same thing in the textbooks. I'm wondering whether they really understand what "memristor" means before they put this new word in their papers.
The resistive switching is a good concept for device development. Some very good results have been shown. There could be good future for ReRAM.
The "memristor", most of us even do not know what it is, should be kept as it was in 1970s, until a sound physical model has been shown. Any mathematicl modelling for a physical concept must be based on basic physical principles.
In my opinion, the misleading "memristor" concept will not help but hurt the development of ReRAM devices. Before the HP works, there were already some excellent pioneer works on resistive switching.
I have just finished reading a Nature Nanotech paper by HP in 2008, another key paper by HP on memristor.
The experiments there cannot even be regarded as a normal "design of experiments" concept, but such a paper can finally pass the peer-review process, and now with high citations. Any well-trained physicist will not accept the method and the superficial analysis described in this paper.
It is interesting to find several more Arxiv papers on the discussion of memristor. I'm wondering whether they have tried to a journal, or just posted there. The memristor paper machine guys might need to answer the questions before their continuing using such a word, even it is really mysterious to them.
It is also interesting to find the pour of memristor neural networks papers from the biology guys.
Good queston. Although, according to Chua, there is a functional relationship between charge and flux (magnetic flux), which is the time integral of current and the time integral of voltage. The slope of this function is what he calls memristance. By this definition, a normal resistor is also a memristor. It just has a constant memristance (slope = 1). When memristance is constant, it is just defining Ohm's law.
These are theoretical electrical components. There will never be a real-world device, from HP or anyone else, that is purely a memristor, just as there will never be a device that is purely a capacitor or inductor. So, in that sense, if the application of current causes a change in resistance, then the term memristor could apply, just as we give the term resistor to a device even if it also ehibits some capacitance.
Whereas the axiomatic definitions of ideal resistors, capacitors and inductors are in accordance with all laws of physics, this is not the case for ideal nonvolatile memristors (M. Di Ventra and Y. V. Pershin, "On the physical properties of memristive, memcapacitive, and meminductive systems", Nanotechnology, vol. 24, (2013) (http://iopscience.iop.org/0957-4484/24/25/255201)). Thus, there is also no place for real nonvolatile memristors by assuming that such real-world devices would exhibit some amount of capacitance or inductance. As the core element - the ideal nonvolatile memristor - is a physically impossible element, any equivalent circuit model including an ideal memristor component would also "operate" in conflict with physics.
The memristor concept is like an air castle. It looks like something but actually nothing. It seems like a new thing, but finally you found it still talked about the same thing. If you say it stands for nothing, they will tell you that it comprises everything.
The original paper by Chua, does not show any non-volatility. In fact, it makes a figure in the IV curve that has the shape of a tilted figure 8, passing through zero and it is a transient result. Not, a hard shut off with permanent storage as any RRAM shows. Sadly enough, the realization of such a figure is not from a single resistor and more from a circuit. In a very unphysical and naive attempt, HP engineers tried to add some physics to lumped circuits. A Junior level Physics book, like Halliday and Resnick could show them that equivalent circuits still must obey Maxwell's equation, for charge must be concerved. In any case, as we all know, there are 3 parameters in Maxwell's equatiosn - conductivity (sigma), permetivity(epsilon) and permeability(mu). All of these reflect 19 century physics in which the Currie-Weiss Mean Field Theory was the only semi-microscopic model. Untill quantum mechanics, such luped parameters led to V=IR etc. A simple diode, tells you that only in the linear low signal regime, ohm's law could be used - that is why we have h-parameters in bipolar transition etc. In the case of a resistor with memory - Memristor - the combination of very thin films (30 nm), oxygen vacancies and electron-hole pairs, including excitons create a messy business that is not really robust in storing anything and the IV curves are unsaturated at nearly zero current (i.e., the insulating phase). A simple, back of the envelop model for such a messy device is to consider that vacancies stay INSIDE of the material and not become a charge carrier through the contact. So, if charged, it just moves back and forth, facilitating mass transfer - a form of electromigration of Ti or O. A well know model for oxides is Vox(+2) + 2e(-) --> Vox(0). The equilibrium constant is k=exp(-Ea/KT) = [Vox(0)]/[Vox(+2)].n^2, where the [.] means concentration and n is the trapped electron concentration in oxygen vacancies. So, the Memmristor, at best is a trapped electron device with a differential voltage dV = I dR + R dI, if dR=0, it is just a resistor. The assertion that dR is not zero and is nonvolatile is a bit too much to swallow when for many years everyone knows that trapped electrons, magneto resistance etc, all have some meory effect. thus, with some algebra, you can easily see that the HP memristor is Ron /Roff = (1- n(trapped)/ n(total)), where n(total) comes from the injected electrons during operation. If all electrons are trapped (extreme case), Ron=0 (conductor) and if n(trapped)< n(total, the more common case, Roff>Ron (insulator). The physics is then only on charge trap - what is new in that? On top of everything, since Vox(+2) is also moving, no two switches are the same. Sorry HP, try quantum mechanics next time to understand electrons and holes and do not count on vacancies as a reliable device parameter.
It's a fair comment about the STT-MRAM. Plus the etching is always a concern from the process point of view, the difficulty of STT-MRAM as for SRAM/DRAM application is getting higher at more advaced nodes. And at the mainstream and old technology nodes, no demand to replace DRAM/SRAM with STT-MRAM either. So kind of subtle situation for STT-MRAM.
As noted in the abstracts the on/off ratios of the devices in the 3D-RRAMs are still on the order of 100-1000 at best. That is hardly worth bragging. Also, some 3D-RRAM current densities (e.g., IMEC) are too high.
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