20nm is about 24% more expensive per unit area and with 1.9x more die gives a 35% cost reduction. The problem is at 16nm where the 1.05x more die than 20nm will not offest the increased cost per unit area and the cost per die will go up.
Wait for carbon tubes to redesign this roadmap. This obsession with smaller feature size is not a roadmap for long haul, it is a marketing message to show innovation. I do not see that value - moving from 22nm to 16nm. I know it was a big deal from 3.3um to 90nm
Doesn't look like they got anything at 20nm working above 3ghz, no gen2+ pcie or hdmi. Got to wonder what sort of pll their making, also. Guess they got three more months to actually sell a 20nm this year. BTW, no talk of yield?
What are the engineering and design challenges in creating successful IoT devices? These devices are usually small, resource-constrained electronics designed to sense, collect, send, and/or interpret data. Some of the devices need to be smart enough to act upon data in real time, 24/7. Are the design challenges the same as with embedded systems, but with a little developer- and IT-skills added in? What do engineers need to know? Rick Merritt talks with two experts about the tools and best options for designing IoT devices in 2016. Specifically the guests will discuss sensors, security, and lessons from IoT deployments.