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krisi
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how fast is IO?
krisi   10/7/2013 1:27:40 PM
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If I read this correctly 100 Gb/s is achieved thru 4 lanes operating at 25 Gb/s...does it mean IO operate at 25 or 12.5 GHz? Kris

rick merritt
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Re: how fast is IO?
rick merritt   10/8/2013 12:52:35 AM
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@Krisi: I/O is at 25G. Engineers have been working to refine 25G serdes and module standards for several years to enable these sorts of products.

Now everyone is starting to jump in and it might be the first big entrey point for optical chip-to-chip links.

a.sun
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will 25G lane rate be used in switches/servers anytime soon?
a.sun   10/8/2013 1:25:28 AM
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My understanding is going from 10G to 25G per lane is not just about the optical transceivers but the whole ecosystem. Is all the things like NICs, PCBs, connectors, etc. ready for 25G? Many Telecom systems are still using power hungry 4:10 gearbox to translate 25G optics to 10G electronics (I don't know if recently hot selling 100G DP-QPSK uses a gearbox though it comes with another power monster, DSP). In his histroy datacom technlogy always fell behind telecom due to its demands for low cost (and of course lower specs as tradeoff). Will 4x25G emerge in datacom/datacenter anytime soon? I highly doubt it.

Putting 4x25G directly on board and close to ICs may be a way to get around the whole ecosystem upgrade (like Intel is pushing, but for a different purpose :-). However, IBM's latest blue water supercomputer still adopts Avago's 12x10G optical engines on server boards. 25G has a long way to go. 

krisi
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Re: will 25G lane rate be used in switches/servers anytime soon?
krisi   10/8/2013 10:35:32 AM
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I don't think there is any question that the whole ecosystem needs to be upgraded, yes, of course...what is the msot interestsing for me is power and cost comparisons between 10 Gb/s and 25 Gb/s lanes...anyone can provide some datapoints? Kris

docdivakar
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Re: will 25G lane rate be used in switches/servers anytime soon?
docdivakar   10/9/2013 5:13:08 PM
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Hi Kris, the power and cost comparisons are too preliminary at this point. The industry has made good progress in materials for high speed motherboards as well as backplane connectors.

There is a good collection of presentation of materials at one of the events we did in the Silicon Valley on the 40G/100G topic (has John D'Ambrosia's slides too):

http://comsocscv.org/showevent.php?id=1373040654

You may also want to see the following link for slides on signal integrity challenges for 100G system:

http://comsocscv.org/showevent.php?id=1372192317

Interestingly Mellanox was not in the Plugfest for CEI-25G-LR and CEI-28G-VSR in 2012:

http://www.oiforum.com/public/documents/2012_OIF_PLL_White_Paper_Feb29.pdf

MP Divakar

krisi
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Re: will 25G lane rate be used in switches/servers anytime soon?
krisi   10/9/2013 6:07:57 PM
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thank you @docdivakar, good links, I downloaded the slides...I was asked to edit a book on 100G, would you be interested in co-editing? kris.iniewski@gmail.com

docdivakar
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Re: will 25G lane rate be used in switches/servers anytime soon?
docdivakar   10/9/2013 5:40:11 PM
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@a.sun: I do agree the 100G advances needed many improvements in the ecosystem. As I commented earlier in this thread, much of it has been addressed already. If you look at the third link in my comment (Plugfest), there are multiple choices of ASICs for 25G/28G including one by IBM. Granted these are not production-ready and power-optimized Silicons, they more than prove the viability of 100G.

I would argue that the migration to 100G in datacenters will come sooner than it did for the 10G. It took more than 5 generations of Silicon to get power consumptions down in 10G and it is still not low enough to make it to desktops and laptops.

MP Divakar

a.sun
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Re: will 25G lane rate be used in switches/servers anytime soon?
a.sun   10/10/2013 2:05:52 AM
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@docdivakar. Thanks for your links! I do hope you're right about that 100G will come soon in datacenters. I saw these multi-vendor 100G (4x25G) demos in the OFC of past two years. Everything is supposed to put together with the upcoming IEEE802.3bm standard.

At the end of the day, it's all about cost and power consumption. Do you know any mature CMOS or BiCMOS 25G analog ICs (driver/TIA)? I know most people uses III-V based ICs which may be a signifcant part of cost. 



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As data rates begin to move beyond 25 Gbps channels, new problems arise. Getting to 50 Gbps channels might not be possible with the traditional NRZ (2-level) signaling. PAM4 lets data rates double with only a small increase in channel bandwidth by sending two bits per symbol. But, it brings new measurement and analysis problems. Signal integrity sage Ransom Stephens will explain how PAM4 differs from NRZ and what to expect in design, measurement, and signal analysis.

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