"Immersion systems may need 22 masks at 10nm, up from ten at 28nm, essentially using costly triple patterning in a handful of layers and double patterning at all others. EUV could cut that down to ten masks at 10nm, researchers estimate."
So, again confirming, essentially just one node (10 nm) for EUV single patterning. Same situation faced 157 nm, with far less drastic infrastructure changes required.
For the memory portion, I was a bit surprised that there was not more focus on vertical NAND or future vertical 3D-NVM. That technology has just recently been announced, while FinFETs have been around much longer.
Also, why so much focus on STT-MRAM? They should know it is quite a fragile device. More fragile than a transistor at leading edge. The read is not 100% non-destructive, for the spec that is expected (quadrillion times).
I watched/listened to a video interview in the past year given by Debra Vogler, in that interview An gave enough reasons to show why EUV is basically "out there" forever, saving my efforts. Dragging N10 and N7 nodes to a decade or longer, is "out there" forever.
Drones are, in essence, flying autonomous vehicles. Pros and cons surrounding drones today might well foreshadow the debate over the development of self-driving cars. In the context of a strongly regulated aviation industry, "self-flying" drones pose a fresh challenge. How safe is it to fly drones in different environments? Should drones be required for visual line of sight – as are piloted airplanes? Join EE Times' Junko Yoshida as she moderates a panel of drone experts.