I take your point about the package and the connector spacing. But that's what the majority of the market wants. As a sidenote, in a BGA_484 package the -7000 part has 335 I/Os.
I don't know the exact timeline of this, but Ross Freeman invented the FPGA after a few years as a math teacher in Ghana in West Africa. I like to imagine him looking at the multiplication tables printed on the back cover of some old exercise books, and thinking to himself "if I replace the multiplication results with other numbers I can change these tables into addition tables or subtraction tables or ... tables." And off he went to invent FPGAs besed on lookup tables.
Children getting into hardware design via something invented by a high school math teacher would be neat.
BTW, the PIF has a couple of flashing LEDs. The default configuration programs them to pulse with growing/fading intensity, rather than simple flashing. That sort of thing only takes up a small corner of the FPGA, but I would really like to see an elegant minimal design of the sort that was produced by the late and much missed Peter Alfke.
The GPU of the RasPi is more or less unusable because it's a black box for normal people. Our intention was to use its processing power for industrial image processing, but it turned out that there's not even enough documentation to hook up our own camera sensor. People are trying to reverse-engineer the thing. From my POV that proprietary piece of silicon should never have found its way on an education board - for many reasons, one of them to teach manufacturers that such politics don't pay off. Broadcom should reconsider, but I lost my project because of that. Found out too late because on the front page it says open hardware, open software.
But enough of that. My point (in my previous post) was that the 7000' chip seems to have hundered(s) of I/Os and only about 20 of them are accessible while loads of board space are used up by wide spaced classic through hole connectors which would not be good for high datarates anyway. The connection to the RasPi is clear, there's no choice since the RasPi itself has very limited I/O - one of my major grieves with it. But the other side could have been made with modern fine pitch connectors - I would have payed the difference.
As it is it is certainly still an interesting piece of hardware and could well extend the educational aspect of the RasPi idea - schools could finaly start to teach hardware, not just software ... well, some LEDs would still be required ;-) ...
The Raspi isn't super quick - an ARM-11 at 700MHz, overclockable to around 1GHz - but the (poorly documented) on-chip graphics processor is said to be pretty potent.
The PIF board has 47 pins of expansion connectors
one 26-pin (2x13-pin) connector matches the Raspberry Pi's P1 connector
one 13-pin connector
one 8-pin connector
A few of these pins are taken up by power and ground. Also, the Raspberry Pi's I2C and SPI buses are routed through to expansion pins, but all the other connector sites go directly to the FPGA.
The (tedious) details are spelt out in the manual which you can download from the PIF page at www.bugblat.com/products/pif
The TIF product has many fewer pins on its expansion connectors - in this regard it follows the pattern of the myriad tiny/teeny/nano/... processor boards. The TIF is 1" long, so it's no surprise that it has 10 connector pins on each side. Two of those pins are grounds and one is USB 5V. Although the TIF can be powered from a USB hookup, there is also a pin for external 5V. The details are in the manual on the the TIF page at www.bugblat.com/products/tif
The pricing is very nice and I have some Raspis lying arround as I found out too late how slow that processor really is ... and I'm also disgusted by the very limited I/O capabilities. So that PIF is interesting. But why can't I get my hands on more I/O lines of the FPGA ? One of my projects is an LED cube and I wanted to do that with an FPGA for training purposes, but I need a lot of lines for multiplexing all those color LEDs. I would have soldered connectors myself, but there don't seem to be any contact pads :-( ... Would have prefered a tinght row of pads instead of those 18 (?) holes in 0.1 inch distance. But hell, better than nothing :-).
I realize this pertains to a completely different class of products, but Altera has developed a OpenCL SDK that compiles OpenCL kernel source code to Verilog. It currently only supports Stratix V series, but presumably could support lower cost chips in future. Is there any possibility this could be done for low power FPGAs? I think this would be a fantastic way to add number crunching ability to low power MCU projects.
The compressed pricing is what happens when we set $35 as the maximum price! It's very difficult to formulate a relatively low volume FPGA product that sells in single quantities for less than $25, so for both the PIF and the TIF we ended up with entry-level products at $24.99 and top-end products at $34.99.
The economics of TIF builds are a little better, 100 units on a panel, no through-hole components, and no flat packs, whereas the PIF is built on panels of 25 with a through-hole connector for the Raspberry Pi and the FPGA in an inconveniently large QFP package.
The usual programmable logic shortcut is to use a CPLD on a two-layer board. But that isn't possible with a full-on FPGA. If you're careful you can wind the MachXO2 PLL up to 250MHz - we have played with it at 400MHz - and that demands a properly engineered board. Fortunately the MachXO2 is inherently a low power chip. One of the design advantages of FPGAs is that you can simultaneouly drive a lot of block RAMs (26 block RAMs on the PIF-7000) at full speed - for that you need a solid board with a decent power distribution network.
We would have different prices for a maxed (!) out PIF and a maxed-out TIF if we were expecting to sell millions, but we only really expect to sell to the engineering elite.
Perhaps we are wrong about demand - that would be nice. For non-specialist users, the documentation includes a reference to Jan Decaluwe's Python-based MyHDL, a bit closer to the mainstream than VHDL and Verilog, so there is scope for a takeup beyond the usual suspects.
Yeah, I plan on getting into FPGA, but that is why I am waiting. I have so many other things in the works, I would rather have what is current at the time (so that it can sit on my shelf for a few years and not be quite as old if I had got it now ;).
As to Microchip. I do like their parts, the just really do not have much to compete with the Cortex M series. I have been disappointed with their peripherals in their 32bit line. Their dsPIC chips are rather nice, but the Cortex M4F series eclipses these in performance and usually are cheaper. Their dev kits are not hugely priced, they lead the way not too many years ago in lower cost dev kits, but now almost all of their dev boards are double the cost of an equivalent chip from another manufacturer. To illustrate this, I purchased 4 different ARM Cortex M dev boards from various vendors for under $60. I could barely get a PICKit3 for that cost. Each of these dev boards can be used as a programmer/debugger for my own personal projects. I do know that they have had a few lower cost boards come out, but almost everything is over $20. Even when they send me the coupons for their development kits, the cost is almost always still more than others.
-- The Papilio platform, starting at $38 for 250K gate Xilenx FPGA, can be Arduino IDE compatible (with soft processor), has add-on wings, and a lot of learning resources
-- If you want to play with the Zynq, there's the Digilent Zybo ($150, with Pmod connectors) and Parallela (Zynq + 16 core CPU)
-- Several FPGA capes such as the Logi-Bone as coming for the BeagleBone.
And while Microchip itself doesn't have anything comparable to TI's Launchpad, there are affordable PIC dev kits from third parties such as:
-- The CUI32Stem ($30, PIC32) which has Grove connectors, and can run Arduino code
-- Digilent has the chipKits (Arduino compatible, PIC32, $24 & up) and Cerebots (Pmod, PIC32, $45 & up)
-- Olimex has low cost PIC boards, and there are probably others.
I like all these choices, but I already have too many kits and eBay items on my to-do list, so no FPGAs for me (I have to finish my current "breadboard" project, which is a hunk of wood with 7 BLDC servo drives, 2 VFDs, and a bunch of distributed I/O).
With the low cost dev boards like this, I may yet get into FPGA. I think that it is something that I want to hold off on for yet another 6 months or a year as I am up to my ears in a few other things, but FPGA is on my todo list.
I wish that all other groups would continue with this trend of low cost dev boards. There are yet a few holdouts that have low performing hardware on high cost dev boards...cough...Microchip...cough...
What are the engineering and design challenges in creating successful IoT devices? These devices are usually small, resource-constrained electronics designed to sense, collect, send, and/or interpret data. Some of the devices need to be smart enough to act upon data in real time, 24/7. Are the design challenges the same as with embedded systems, but with a little developer- and IT-skills added in? What do engineers need to know? Rick Merritt talks with two experts about the tools and best options for designing IoT devices in 2016. Specifically the guests will discuss sensors, security, and lessons from IoT deployments.