The vertical nanowire width has to include silicon body (channel), 2x gate oxide thickness, and 2x gate thickness. So 40 nm is no surprise. Maybe this width defines a pitch, or a new feature dimension defines the node.
What are the engineering and design challenges in creating successful IoT devices? These devices are usually small, resource-constrained electronics designed to sense, collect, send, and/or interpret data. Some of the devices need to be smart enough to act upon data in real time, 24/7. Specifically the guests will discuss sensors, security, and lessons from IoT deployments.