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Nick Balmez
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Testing NAND chip
Nick Balmez   10/30/2013 2:13:25 PM
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In a NAND Functional Tester I implemented the algorithm to detect during Read/Verify the actual ECC required per Block and Device.

Applying repeatedly Erase/Program/Read/Verify to the same block emphasized the Endurance (measured in number of Erase/Program cycles) based on the evolution of ECC detected during Read/Verify.

Lately a customer ran, on an ONFI2.2 Chip with ECC Unit of 1117 Bytes and minimum required ECC 40 according to the spec, repeatedly, Erase/Program/Read/Verify cycles on the same Block. During the first cycle the ECC detected by the tester for that Block was 6, after 3K cycles ECC detected was 17, after 5K cycles ECC 29.



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