Yeah. Apple looks very different. Its M7 used NXP's Cortex-M3 based LPC18A1, of which the ARM core is optimized for performance efficiency. I guess the teams from both Apple and NXP have done a lot of things to improve the coprocessor's power efficiency.
It is exciting that most MCU/MEMS vendors have been showing their muscles since Apple released its latest iPad product with M7 sensor hub coprocessor. It seems most of the exisiting solutions are ARM Cortex-M0/0+ based or comparable solutions, which target extemely energy efficiency but with limited computing capabilities.
Will Cortex-M3/4 based solutions be coming out in the future to meet ever-increasing more complex computing tasks, e.g., 3-D recognition, while still tailored for low energy requirement by other advanced low power design techniques?
This seems like a very incremental announcement of a so-so drop-in improvement part, in Q4 Invensense is due to have a 9 axis drop-in part which I would far prefer. MEMs inertial parts drift badly and without the magnetometer which the new 6 axis MPU-6515 doesn't have, it is going to get lost rather quickly. If you need contextual awareness in a smart device then a 9 axis part in Q1 will have a far better solution.
Replay available now: A handful of emerging network technologies are competing to be the preferred wide-area connection for the Internet of Things. All claim lower costs and power use than cellular but none have wide deployment yet. Listen in as proponents of leading contenders make their case to be the metro or national IoT network of the future. Rick Merritt, EE Times Silicon Valley Bureau Chief, moderators this discussion. Join in and ask his guests questions.