It looks like the unit component cost is becoming more expensive. I expect NMOS and PMOS to have different solutions. Like maybe Ge-related for PMOS. On top of added cost for the fins. Yet can't compensate by shrinking extra aggressively either.
Pretty cool idea but I don't think it will be the key for 10nm? People have been trying to merge high-speed operation of III-V materials with silicon for a long time but it has never happened on a commercial basis, always too expensive with low yeilds...I don't see this is being different but prove me wrong! Kris
While I can say that this is one of the finest invention and surely can give many advantages to the technology. However I am sure that this can cost much money in order to be fully developed and deployed. - Marla Ahlgrimm
This is a general trends in the industry. Industrials continue to move beyond the old CMOS integration by the integration of new materials. The channel is the only one remaining after changing the gate, the oxide and the contact. (While the channel stressors already make a large improvement)
So this is a natural move and once changed, it will continue to improve at every generation. Starting from Si substrate make it cheap and allows different material integration for NMOS and PMOS.
As usual, the only question is the timing and the first mover. Intel again?
What are the engineering and design challenges in creating successful IoT devices? These devices are usually small, resource-constrained electronics designed to sense, collect, send, and/or interpret data. Some of the devices need to be smart enough to act upon data in real time, 24/7. Specifically the guests will discuss sensors, security, and lessons from IoT deployments.