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genegoebel
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Mass production
genegoebel   11/11/2013 12:55:21 PM
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The reality is simple. Its been mentioned numerous times throughout prior comments. Simply put we need the volume equivalent to current MCU or DRAM. Volume will make 3-D affordable. So when there is demand for 200,000 WPM we will see mass adoption.

genegoebel
User Rank
Rookie
Mass production
genegoebel   11/11/2013 12:55:19 PM
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The reality is simple. Its been mentioned numerous times throughout prior comments. Simply put we need the volume equivalent to current MCU or DRAM. Volume will make 3-D affordable. So when there is demand for 200,000 WPM we will see mass adoption.

Or_Bach
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Rookie
Re: Poor man's 3D IC for Apple A7 ...
Or_Bach   11/10/2013 3:53:09 AM
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Hi Rick

Quoting from the Tip Sheet for 2013 IEDM:

"The monolithic 3D architecture demonstrated high performance – 3-ps logic circuits, 1-T 500ns nonvolatile memories and 6T SRAMs with low noise and small footprints, making it potentially suitable for compact, energy-efficient mobile products. (Paper #9.3, "Monolithic 3D Chip Integrated with 500ns NVM, 3ps Logic Circuits and SRAM," C–H. Shen et al, National Nano Device Laboratories)

rick merritt
User Rank
Author
Re: Poor man's 3D IC for Apple A7 ...
rick merritt   11/10/2013 1:11:24 AM
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@Zvi: Can you describe a memory+logic design done in your approach?

chipmonk0
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Manager
Re: Poor man's 3D IC for Apple A7 ...
chipmonk0   11/9/2013 11:38:04 AM
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@ Zvi Or Bach :

 

has any monolithic 3D chip with Logic on top of memory stack been built yet ? Quite aside from the process integration issues would n't the difference in floorplan between Memory and a SoC increase the interconnect length, thus largely negating the advantage of short vias ?

_hm
User Rank
CEO
Yield and Design for Test
_hm   11/9/2013 7:47:26 AM
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Apple's approach to poor man's 3D packaging must have logic behind it. Two of that can be very good yield for current manufacturing and Design for Testability. If you need to meet these two aspects, Apple's approach may be prudent.

Real 3D packagin may be more essential for wearable technology and devices.

 

Or_Bach
User Rank
Rookie
Re: Poor man's 3D IC for Apple A7 ...
Or_Bach   11/8/2013 10:38:15 PM
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Hi Rick

Yes, monolithic 3D provide the highest bandwidth between memory and logic, as the connection to the memory is extremly short - less than 1 micron. 

chipmonk0
User Rank
Manager
Dick James & ChipWorks
chipmonk0   11/8/2013 5:48:41 PM
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have been a valuable resource over the years. They were indeed the first to report SONY using face to face SoC - DRAM in wide I/O in their handheld Vita game system.

They ought to branch out into analyzing Packages as well, since integration at the Package level looks ever more attractive as chasing Moore's Law becomes unaffordable for most.

chipmonk0
User Rank
Manager
Re: Poor man's 3D IC for Apple A7 ...
chipmonk0   11/8/2013 5:38:50 PM
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you could look up my hour long rant and rave at ARM TechCon last week, just skip the Math.

rick merritt
User Rank
Author
Re: Poor man's 3D IC for Apple A7 ...
rick merritt   11/8/2013 3:37:34 PM
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@Chipmonk: Great perspective! I'd love to read YOUR teardowns of these iProducts

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