Herb is probably tied up with the interposer workshop at GIT, so I'll jump in - Simon's point was that the world is going to 3D IC, which means using vertical interconnects/Through Silicon Vias to connect stacked chips. Using TSVs decreases line lengths significantly, and this is where the decrease in resistance and capacitance occurs.
What are the engineering and design challenges in creating successful IoT devices? These devices are usually small, resource-constrained electronics designed to sense, collect, send, and/or interpret data. Some of the devices need to be smart enough to act upon data in real time, 24/7. Specifically the guests will discuss sensors, security, and lessons from IoT deployments.