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chipmonk0
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Any update on Micron's Hybrid Memory Cube
chipmonk0   11/22/2013 6:18:51 PM
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they were supposed to have demo systems using their HMC 3-d memory at this supercomputer conf in Denver. Any updates on that ?

DMcCunney
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Does anyone proofread this stuff?
DMcCunney   11/22/2013 9:11:03 PM
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This problem has been exasperated

s/exasperated/exacerbated/


Kiralexis
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Re: Any update on Micron's Hybrid Memory Cube
Kiralexis   11/23/2013 8:28:12 PM
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Yes, functional demo boards from PicoComputing among others were shown off. Fujitsu also showed prototypes of a future SPARC64 hpc system using HMC as its memory.

Derick Carmen
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Re: Any update on Micron's Hybrid Memory Cube
Derick Carmen   11/23/2013 10:12:16 PM
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I am thankful for the newest ideas they introduced. This way they could come up something better if successful and many can even adapt the ideas for betterment. - Derrick Strauss

Kinnar
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A new way of accessing memories
Kinnar   11/24/2013 5:16:10 AM
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At most it is a new way of accessing the memories, in digital systems dealing with data is nothing but dealing with memories, Big Data Problems still demands a universal way to handle any problem associated with it, but still this solutions if claiming good results in certain directions, let's see how much it actually becomes effective.

Araucaria
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Re: Does anyone proofread this stuff?
Araucaria   11/24/2013 6:54:21 AM
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Also "Automata has been in development for seven years, spurned by customer requests". Did they spurn the customer's requests?? Do they mean "spurred on by customer requests"?

DrQuine
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the sweet spot for parallel processing
DrQuine   11/24/2013 3:02:05 PM
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Processing big data sounds like an ideal application for parallel processing: huge quantities of data each of which nbeed to be processed through the same algorithms.  I used a massively parallel processor (32,000 processors as I recall) in 1979 for image processing and was amazed at the work that could be done with just a 1 MHz clocked system. The pixels in images are just a special case of big data.

ckachris
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Data-flow
ckachris   11/25/2013 8:35:56 AM
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According to the article, the AP architecture is data-flow based. In the past, dataflow architecture was also proposed for network procesing applications (e.g. xelerated dataflow network processor) but the main challenge is the programming complexity and the programming restrictions of these architectures.

Also it looks similar to the transputer processors architecture that were targetting parallel computing. 

However, this automata processor seems to have included both an efficient programming framework/SDK and an efficient silicon implementation.

rick merritt
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Cool processors we can't program
rick merritt   11/25/2013 10:20:24 AM
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I've lost count of how many novel and ground breaking parallel processors I've written about in 20 years at EE Times that have died quiet deaths because no one could write code for them. Is this any different?

Sanjib.A
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architecture of an AP vs CPLD
Sanjib.A   11/25/2013 11:24:42 AM
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Don't know much about Automata Processor (AP)...please forgive me for a novice question. "Its design is based on an adaptation of memory array architecture"...sounds more like an architecture similar to that of a CPLD...how does a AP architecture compare to that of a CPLD or FPGA?

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