Breaking News
Comments
Newest First | Oldest First | Threaded View
Max The Magnificent
User Rank
Blogger
Re: how many gates?
Max The Magnificent   12/6/2013 12:48:34 PM
NO RATINGS
@DrFPGA: ...we know you never exagerate...

I've told you a million times that I don't exagerate LOL. Does anyone still talk about "system gates" -- if so, I can certainly tie all these things together -- I learned all sorts of cool stuff last .... eeek, I can't talk about that yet...

DrFPGA
User Rank
Blogger
Re: how many gates?
DrFPGA   12/6/2013 12:44:24 PM
NO RATINGS
I guess this means you are going to finally provide the correct conversion from gates to system gates to 4 input LUTs, etc? All will be revealed is a big promise Max, and we know you never exagerate...

sgabriel
User Rank
Rookie
Re: how many gates?
sgabriel   12/3/2013 8:13:47 PM
NO RATINGS
@krisi, that comes out to be >5 billion CMOS transistors in Arria 10. Very impressive for mid-range FPGA, to say the least.

krisi
User Rank
CEO
Re: how many gates?
krisi   12/3/2013 7:32:05 PM
NO RATINGS
thank you @sgabriel...over 1M logic elements, impressive...how many CMOS transistor is that?

sgabriel
User Rank
Rookie
Re: how many gates?
sgabriel   12/3/2013 7:03:38 PM
NO RATINGS
@krisi, Altera has disclosed product details of our 20nm Arria 10 family. The largest Arria 10 device has up to 1.15M logic elements, integrated into a mid-range device. And public software support is available today. http://www.altera.com/devices/fpga/arria-fpgas/arria10/arr10-index.jsp

Max The Magnificent
User Rank
Blogger
Re: how many gates?
Max The Magnificent   12/3/2013 3:51:44 PM
NO RATINGS
@Kris: ...sounds mysterious Max...

Just call me "Max, Man of Mystery" LOL

krisi
User Rank
CEO
Re: how many gates?
krisi   12/3/2013 3:42:50 PM
NO RATINGS
sounds mysterious Max...looking forward

Max The Magnificent
User Rank
Blogger
Re: how many gates?
Max The Magnificent   12/3/2013 3:34:23 PM
NO RATINGS
@Kris: How many gates Xilinx can pack in 20nm process?

I know, but I'm not allowed to tell you just at the moment. All I can say is to keep on visiting Programmable Logic Designline because all will soon be revealed...

krisi
User Rank
CEO
how many gates?
krisi   12/2/2013 4:27:23 PM
NO RATINGS
How many gates Xilinx can pack in 20nm process? Kris



EE Life
Frankenstein's Fix, Teardowns, Sideshows, Design Contests, Reader Content & More
Max Maxfield

What's the Best Traveling Toolkit?
Max Maxfield
12 comments
A few years ago at a family Christmas party, I won a pocket knife as part of a "Dirty Santa" game. This little scamp was a Buck 730 X-Tract. In addition to an incredibly strong and sharp ...

Rishabh N. Mahajani, High School Senior and Future Engineer

Future Engineers: Don’t 'Trip Up' on Your College Road Trip
Rishabh N. Mahajani, High School Senior and Future Engineer
9 comments
A future engineer shares his impressions of a recent tour of top schools and offers advice on making the most of the time-honored tradition of the college road trip.

Larry Desjardin

Engineers Should Study Finance: 5 Reasons Why
Larry Desjardin
41 comments
I'm a big proponent of engineers learning financial basics. Why? Because engineers are making decisions all the time, in multiple ways. Having a good financial understanding guides these ...

Karen Field

July Cartoon Caption Contest: Let's Talk Some Trash
Karen Field
159 comments
Steve Jobs allegedly got his start by dumpster diving with the Computer Club at Homestead High in the early 1970s.

Top Comments of the Week
Flash Poll
Like Us on Facebook
EE Times on Twitter
EE Times Twitter Feed

Datasheets.com Parts Search

185 million searchable parts
(please enter a part number or hit search to begin)