Breaking News
Comments
Newest First | Oldest First | Threaded View
resistion
User Rank
CEO
Quadruple patterning cheap enough?
resistion   12/7/2013 9:15:19 AM
NO RATINGS
16 nm needs quadruple patterning or 2x double patterning but chips per area not doubled. So patterning cost not doubled? Otherwise stay at 20 nm.

etienneazerty
User Rank
Rookie
Re: 3D NAND Challenges
etienneazerty   12/4/2013 7:57:54 AM
NO RATINGS
Frankly, all the references you gave are based on a etch process that is flawn. Very high aspect ratio etch has no relation with conventional etching, notion like taper angle are inexistent.

With the same number DRAM capacitance scaling is impossible since many generations. Samsung is leader in DRAM by the way, so such etching technology is all but new.

I really think that we need a guy to catch a VNAND die, cut it and show to the community what is really inside so "consultants" can start from real numbers.

FraAmelia
User Rank
Rookie
SS 3D: 24 layers
FraAmelia   12/4/2013 4:23:43 AM
NO RATINGS
Based on what SS discolsed the 128Gb V-NAND has 24 layers not 32. could you please comment?

thanks

toom_tabard
User Rank
Manager
3D NAND Challenges
toom_tabard   12/3/2013 2:06:34 PM
Great article Gary.

The cost aspects of Samsung/Toshiba's vertical channel 3D NAND approaches were published last month in the IEEE Transactions on Semiconductor Manufacturing (see the following link for free download: http://bit.ly/1imVpBb)

A description of these cost challenges along with other technical issues can be found here at 3DIncites: http://bit.ly/17c1DPw

The main points are:

(1) If those vertical holes and slits are beyond a few tenths of a degree from the normal (in other words, if they are slightly slanted), the whole concept is no longer economically viable and can be undercut in cost by other approaches.

(2) The string currents rapidly decline as densities/capacities increase to the point where the question arises whether such approaches are indeed foundations for several generations to come or are simply one-offs.

Full disclosure - Both the IEEE paper and the 3DIncites piece were written by me.



EE Life
Frankenstein's Fix, Teardowns, Sideshows, Design Contests, Reader Content & More
Max Maxfield

Aging Brass: Cow Poop vs. Horse Doo-Doo
Max Maxfield
13 comments
As you may recall, one of the things I want to do with the brass panels I'm using in my Inamorata Prognostication Engine is to make them look really old. Since everything is being mounted ...

EDN Staff

11 Summer Vacation Spots for Engineers
EDN Staff
11 comments
This collection of places from technology history, museums, and modern marvels is a roadmap for an engineering adventure that will take you around the world. Here are just a few spots ...

Glen Chenier

Engineers Solve Analog/Digital Problem, Invent Creative Expletives
Glen Chenier
11 comments
- An analog engineer and a digital engineer join forces, use their respective skills, and pull a few bunnies out of a hat to troubleshoot a system with which they are completely ...

Larry Desjardin

Engineers Should Study Finance: 5 Reasons Why
Larry Desjardin
45 comments
I'm a big proponent of engineers learning financial basics. Why? Because engineers are making decisions all the time, in multiple ways. Having a good financial understanding guides these ...

Flash Poll
Top Comments of the Week
Like Us on Facebook
EE Times on Twitter
EE Times Twitter Feed

Datasheets.com Parts Search

185 million searchable parts
(please enter a part number or hit search to begin)