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Max The Magnificent
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Re: Who, what, when, how?
Max The Magnificent   12/4/2013 3:43:13 PM
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@William: I believe it is Stellamar...

Those are the lads -- great IP as I recall

MS243
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Re: Who, what, when, how?
MS243   12/4/2013 3:30:24 PM
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I believe it is Stellamar -- they sell other IP and used to be in Chicago.   Xilinx, Actel, and others offer their IP via a third party arrangement.  There also are ADC in FPGA app-notes by Lattice, and Altera.

Max The Magnificent
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Who, what, when, how?
Max The Magnificent   12/4/2013 1:36:00 PM
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There was a company who was selling IP to do this sort of thing in FPGAs -- using an LVDS input pair to drive a soft core implemented in programmable digital fabric to implement an analog to digital converter. One of the advantages they talked about was using such a part in space -- if you already had a space-qualified digital FPGA -- it was quicker / cheaper / less risky to implement an ADC in the FPGA's digital fabric than to space-qualify an analog part.

Do you recall the name of that company?



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As data rates begin to move beyond 25 Gbps channels, new problems arise. Getting to 50 Gbps channels might not be possible with the traditional NRZ (2-level) signaling. PAM4 lets data rates double with only a small increase in channel bandwidth by sending two bits per symbol. But, it brings new measurement and analysis problems. Signal integrity sage Ransom Stephens will explain how PAM4 differs from NRZ and what to expect in design, measurement, and signal analysis.

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