Design Con 2015
Breaking News
Comments
Newest First | Oldest First | Threaded View
Page 1 / 2   >   >>
TarraTarra!
User Rank
CEO
Re: Dealing with the slowdown
TarraTarra!   12/15/2013 6:02:01 AM
NO RATINGS
@rick

"In the future they may not be able to charge the premiumjs for 28nm, 16nm they charge today, but then they will not have the enormous expenditures of new multibillion dollar fabs every 18 monthys either. The biz dynamics will shift radically.

Imagine what that might  be like!"

 

Yes - what egalitarian dreams! I can only imagine the large swaths of un-washed masses storming the bastile. Cake (FinFet) for everyone! 

Susan Rambo
User Rank
Blogger
Re: Moore's Law
Susan Rambo   12/13/2013 2:34:48 PM
NO RATINGS
Now people are fighting over who predicted Moore's Law would end? It would be good to have a timeline of predictions, just for fun.

zewde yeraswork
User Rank
Blogger
Moore's Law
zewde yeraswork   12/13/2013 1:29:54 PM
NO RATINGS
I just spoke with a technologist at a leading OEM and server design company who says Moore's Law ended about ten years and claims to have predicted the end about twelve years ago...whether or not that's true, it seems everyone is finally accepting that the days of packing more transistors and getting a denser and denser product are nearing an end--albeit slowly....

moloned
User Rank
Rookie
Re: Life After Moore's Law
moloned   12/13/2013 7:47:19 AM
NO RATINGS
3D is interesting but even TSVs are too expensive for many applications

Most volume applications use die-stacking in package and wire-bonding for stacked DDR

Going 3D rather than TSV or wire-bonding means you have a huge heat problem and this may prove as much of a limitation as the number of Si atoms in the channel

Samueli who is a brilliant engineer is quite correct that 28nm will be the most cost effective node and few applications will be able to justify going below

For those that do the volumes will have to be huge and the platforms will be programmable so essentially you'll be talking about a commodity SoC business a bit like DRAM is today

Bill Dally's work on ELM at Stanford and now on Echelon at Nvidia charts how this will be possible and programmable solutions will get to between 1.5 and 3x ASIC

The big issue will be how to program these chips efficiently to approach these limits

As proebsting's law notes you can't rely on compilers to deliver the benefits

So SW engineers will have to work for a living instead of relying on Moore's law for a free ride

chipmonk0
User Rank
Manager
Re: Dealing with the slowdown
chipmonk0   12/13/2013 12:16:17 AM
as the R&D cost incurred by the leading Foundry to keep up with Intel shoots up, that cost is bound to get xferred to their Fabless customers, cutting into their huge margin up to now. this is what I had meant as "the free lunch is over for the fabless wonders"

Or_Bach
User Rank
Rookie
Life After Moore's Law
Or_Bach   12/12/2013 6:10:36 PM
NO RATINGS
1 saves
Yes, it is clear thar cost per transistor is not going down with dimension scaling, but new type of scaling - monolithic 3D - would keep Moore's Law in the near future. Samsung is already doing so with 3D NAND and other are moving toward monolithic 3D just as well. The first adaption of monolithic 3D is in the memory segment, and other segment will follow, as we just recently learned whith Qualcomm sign up with CEA Leti. In a recent Blog we articulated why Scaling makes monolithic 3D IC practical http://electroiq.com/blog/2013/10/scaling-makes-monolithic-3d-ic-practical/, and in our site we present the cost and othe benifits the monolithic 3d technology provides - http://www.monolithic3d.com/3d-ic-edge1.html

rick merritt
User Rank
Author
Re: Dealing with the slowdown
rick merritt   12/12/2013 5:55:14 PM
@Tarra: Fabs like TSMC are just starting to ramp up really expensive (profitable) 3-D stacking processes.

In the future they may not be able to charge the premiumjs for 28nm, 16nm they charge today, but then they will not have the enormous expenditures of new multibillion dollar fabs every 18 monthys either. The biz dynamics will shift radically.

Imagine what that might  be like!

junko.yoshida
User Rank
Blogger
Re: Dealing with the slowdown
junko.yoshida   12/12/2013 3:41:50 PM
NO RATINGS
@TarraTarra! I think you're right. It will be problematic for foundries who need new nodes to keep differentiating their services and charge premiums..

TarraTarra!
User Rank
CEO
Re: design
TarraTarra!   12/12/2013 3:05:42 PM
NO RATINGS
This does level the playing field a bit. Design innovation is where companies will have to distinguish themselves. The best, most efficient design shall survive rather than the design on the latest process node.

TarraTarra!
User Rank
CEO
Re: Dealing with the slowdown
TarraTarra!   12/12/2013 3:02:45 PM
NO RATINGS
Isnt it more of a problem for the companies with fabs? Process node advantage will not provide the benefits as before and the cost of sustaining new fabs increasing.

Page 1 / 2   >   >>


Top Comments of the Week
Flash Poll
Like Us on Facebook

Datasheets.com Parts Search

185 million searchable parts
(please enter a part number or hit search to begin)
EE Life
Frankenstein's Fix, Teardowns, Sideshows, Design Contests, Reader Content & More
<b><a href=Betajet">

The Circle – The Future's Imperfect in the Present Tense
Betajet
5 comments
The Circle, a satirical, dystopian novel published in 2013 by San Francisco-based writer Dave Eggers, is about a large, very powerful technology company that combines aspects of Google, ...

Max Maxfield

Recommended Reads From the Engineer's Bookshelf
Max Maxfield
34 comments
I'm not sure if I read more than most folks or not, but I do I know that I spend quite a lot of time reading. I hate to be idle, so I always have a book or two somewhere about my person -- ...

Martin Rowe

Make This Engineering Museum a Reality
Martin Rowe
Post a comment
Vincent Valentine is a man on a mission. He wants to make the first house to ever have a telephone into a telephone museum. Without help, it may not happen.

Rich Quinnell

Making the Grade in Industrial Design
Rich Quinnell
16 comments
As every developer knows, there are the paper specifications for a product design, and then there are the real requirements. The paper specs are dry, bland, and rigidly numeric, making ...

Special Video Section
The LT8640 is a 42V, 5A synchronous step-down regulator ...
The LTC2000 high-speed DAC has low noise and excellent ...
How do you protect the load and ensure output continues to ...
General-purpose DACs have applications in instrumentation, ...
Linear Technology demonstrates its latest measurement ...
10:29
Demos from Maxim Integrated at Electronica 2014 show ...
Bosch CEO Stefan Finkbeiner shows off latest combo and ...
STMicroelectronics demoed this simple gesture control ...
Keysight shows you what signals lurk in real-time at 510MHz ...
TE Connectivity's clear-plastic, full-size model car shows ...
Why culture makes Linear Tech a winner.
Recently formed Architects of Modern Power consortium ...
Specially modified Corvette C7 Stingray responds to ex Indy ...
Avago’s ACPL-K30T is the first solid-state driver qualified ...
NXP launches its line of multi-gate, multifunction, ...
Doug Bailey, VP of marketing at Power Integrations, gives a ...
See how to ease software bring-up with DesignWare IP ...
DesignWare IP Prototyping Kits enable fast software ...
This video explores the LT3086, a new member of our LDO+ ...
In today’s modern electronic systems, the need for power ...