Clearly there are many companies offering ARM SoC's in this space that deserve some sort of credit. But Intel can still leverage its advantage in the server processor market in general in order to take those companies on in microservers in the long-run. Calxeda is a good example of the pressure and the difficulty that those companies face, given its recent fate.
@Fonya: Give Intel some credit for radically scaling back the power of Xeon and Atom cores in servers...and fir being the the first to ship a custom low-power SoC for servers. Atom's there today, ARM not yet really.
Perhaps Intel did define the term microserver, but not the drivers behind it and it's natural existence today. Just look at current cost and power requirements in server infrastructure, the shrinking bang for the buck being realized by purchasing the latest, highest-power server processors for current workloads, and the increasing availability of SOC-based processors with enhanced IO and various heterogeneous compute engines. Intelligent scaling is sorely needed that makes use of these growing and different features, not just brute force as has been the mantra in the past.
Current C2xxx (Avoton/Rangeley) line include octa, quad and dual core offerings.
Some design groups are considering greater than eight core micro server processors on the interconnect power saving and blade density. The issue with greater than eight core include fabrication yield and device reliability; mean time between failure. And from a system perspective managing concurrency across up to 24 cores which some propose as the upper limit.
Cloud shops moving to disaggregated rack seek low cost and high density. When a micro blade fails the cloud provider wants to hot swap replace. This raises a concern with multi core processors when a single core fails and the entire array gets pulled and tossed. To the extent a few bad cores can be mitigated by VM seems a possibility, but is beyond the knowledge reference of this analyst if and how so.
Because these are complicated devices sought by cloud providers, for not enough margin from their design producers or design fabricators, device's cost : price ratio supporting design producer margin and development into tomorrow becomes a joint concern.
This analyst believes a standard body might be established focused on failure analysis of multi core blades. With the objective of rating mean time between failures sufficiently to price justify, to the cloud provider, supporting an adequate level of margin for the design producer to justify their continued effort in research and development.
Where cloud providers are concerned with substantial failure of a processing array, which they attempt to secure at the lowest possible price, failure assessment delivering MTBF for life expectancy becomes one means too justify a single multi core processor's adequate economic profit offer price.
For Intel C2xxx quads and duals are not a unique mask set but recovered or disabled. Intel offers less than an eight core offering and will certainly sell less than an eight core offering. The issue for Intel recovering or disabling the eight core device holds a cost that results in overall margin loss across the full production run.
Simply stated if Intel produces 100% of C2xx run as eight core device the average 1,000 units price would be $160.50. Average marginal revenue gain for producing a single octa device would be $140.50. And the design production cost approximately $20 per unit on a good fabrication day. Full Run Revenue at 1,000 unit price for 100% octa cores could be up to $2,514,453,669.
Noteworthy the marginal cost per mm^2 of dice area for Haswell and Xeon 26xx v2 design production is higher than $0.20 per mm^2 of dice area. Cost increase is attributed to the number of Haswell experimental design failures that impact full run sunk cost. For Xeon Ivy refresh the shear size of the dice means even on a good fabrication day the cost per mm^2 for large dice will be greater than small dice.
Economics suggest Intel's design production cost currently averages $0.38 per mm^2 of dice area; low of $0.15 and high of $0.68. During the 1990's one measure for estimating Intel cost is the low price offering within any run. The axiom does not necessarily apply today, however, is still one measure to check against when estimating Intel design and production cost per unit of devices.
Now back to the overall cost impact of recovering or disabling C2xxx from eight to four or two cores. Recovering or disabling comes with a cost. To produce 15,666,387 C2xxx bin split 46% octa, 27% quad and 27% duals delivers average weighed price of $108.69.
This analyst believes AWP is actually higher, $121 to $127, which is a 6 core mouse trap Intel deploys to limit competitors from producing a hexa core competitive replacement, missing from Intel's C2xxx product line up. Where $121 to $127 is Intel's bundled sales package price for the 8/4/2 core 'take it or leave it' package deal. To the extent Intel does not offer a six core device suggests there is yield failure across all eight core C2xxx production.
Having recovered or disabled the bad octa devices, for sale as quads and duals, Intel's marginal cost of production is still approximately $20 for a 100 mm^2 octa device. But now the marginal revenue per device is down to $88.53. In this example Intel gives up $71.97 in revenue for each disabled device to produce the quads and duals.
Full run revenue impact across the production of 15,666,387 total devices of which 42%, or 6,579,883 are quads and duals, is $1,702,823,241 or ($811,630,428) less. That is why Intel has an incentive to sell only the eight core device. Intel cost of producing disabled or recovered quads and duals from the octa total reduces revenue at a cost increase of $473,554,146. This brings the actual design production cost of C2xxx quads and dual up to just under the product lines price low of $43 or cost plus $6 to $8. To the extent that octa yields are less than 46% means some of C2xxx production, likely the duals, are sold at cost. Or bundled in as freebee.